Re: [PATCH] perf list: Add IBM z17 event descriptions

[Thomas Richter <tmricht@linux.ibm.com>]

On 6/23/25 19:53, Ian Rogers wrote:
> On Mon, Jun 23, 2025 at 6:35 AM Thomas Richter <tmricht@linux.ibm.com> wrote:
>>
>> Update IBM z17 counter description using document SA23-2260-08:
>> "The Load-Program-Parameter and the CPU-Measurement Facilities"
>> released in May 2025 to include counter definitions for IBM z17
>> counter sets:
>> * Basic counter set
>> * Problem/user counter set
>> * Crypto counter set.
>>
>> Use document SA23-2261-09:
>> "The CPU-Measurement Facility Extended Counters Definition
>>  for z10, z196/z114, zEC12/zBC12, z13/z13s, z14, z15, z16 and z17"
>> released on April 2025 to include counter definitions for IBM z17
>> * Extended counter set
>> * MT-Diagnostic counter set.
>>
>> Use document SA22-7832-14:
>> "z/Architecture Principles of Operation."
>> released in April 2025 to include counter definitions for IBM z17
>> * PAI-Crypto counter set
>> * PAI-Extention counter set.
>>
>> Use document
>> "CPU MF Formulas and Updates April 2025"
>> released in April 2025 to include metric calculations.
>>
>> Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
>> Acked-by: Sumanth Korikkar <sumanthk@linux.ibm.com>
> 
> [snip]
> 
>> +       {
>> +               "Unit": "CPU-M-CF",
>> +               "EventCode": "143",
>> +               "EventName": "L1C_TLB2_MISSES",
>> +               "BriefDescription": "L1C TLB2 Misses",
>> +               "PublicDescription": "Increments by one for any cycle where a Level-1 cache or Level-2 TLB miss is in progress."
>> +       },
> 
> [snip]
> 
>> +  {
>> +    "BriefDescription": "Cycles per Instructions from Finite cache/memory",
>> +    "MetricName": "finite_cpi",
>> +    "MetricExpr": "L1C_TLB2_MISSES / INSTRUCTIONS if has_event(L1C_TLB2_MISSES) else 0"
>> +  },
>> +  {
>> +    "BriefDescription": "Estimated Instruction Complexity CPI infinite Level 1",
>> +    "MetricName": "est_cpi",
>> +    "MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(INSTRUCTIONS) else 0"
>> +  },
>> +  {
>> +    "BriefDescription": "Estimated Sourcing Cycles per Level 1 Miss",
>> +    "MetricName": "scpl1m",
>> +    "MetricExpr": "L1C_TLB2_MISSES / (L1I_DIR_WRITES + L1D_DIR_WRITES) if has_event(L1C_TLB2_MISSES) else 0"
>> +  },
> 
> Just a quick check. If the PMU CPU-M-CF is always present then the
> "has_event(L1C_TLB2_MISSES)" check will always be true as the event is
> in json and not in sysfs. I'm guessing this is being done for the
> benefit of hypervisors.
> 

The issue is indeed with z/VM, where the CPU Measurement facility is not exported to
any guest OS including linux.
If you run Linux on top of z/VM then these events do not exist.

# uname -a
Linux a8345022.lnxne.boe 6.16.0-rc1m-perf #14 SMP Tue Jun 10 07:39:06 CEST 2025 s390x GNU/Linux
# grep VM /proc/sysinfo 
VM00 Name:            A8345022
VM00 Control Program: z/VM    7.4.0   
VM00 Adjustment:      50
VM00 CPUs Total:      4
VM00 CPUs Configured: 4
VM00 CPUs Standby:    0
VM00 CPUs Reserved:   0
# lscpumf 
lscpumf: No CPU-measurement facilities detected
# 

Without this if..else the perf stat -e metric fail when Linux is installed on top of z/VM systems.
See commit c2f3d7dfc7373 ("perf stat: Do not fail on metrics on s390 z/VM systems")

which fixed it for z16 machine generation.

Hope this helps.

> Thanks,
> Ian


-- 
Thomas Richter, Dept 3303, IBM s390 Linux Development, Boeblingen, Germany
--
IBM Deutschland Research & Development GmbH

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