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From: Sean Christopherson <seanjc@google.com>
To: Dapeng Mi <dapeng1.mi@linux.intel.com>
Cc: sashiko@lists.linux.dev, linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v3 1/9] perf/x86/intel: Ensure guest PEBS path doesn't set unwanted PERF_GLOBAL_CTRL bits
Date: Thu, 21 May 2026 07:04:41 -0700	[thread overview]
Message-ID: <ag8Q-UM5dcVtBijd@google.com> (raw)
In-Reply-To: <a75397bd-6122-4fa8-8197-334b2fbbb5af@linux.intel.com>

On Thu, May 21, 2026, Dapeng Mi wrote:
> On 5/15/2026 9:49 AM, Mi, Dapeng wrote:
> > On 5/15/2026 8:01 AM, Sean Christopherson wrote:
> >>> Anyway, we could optimize the code further like below and thoroughly filter
> >>> away these extra bits. (only building, not test on real HW)
> >> Hmm, I think I'd rather figure out what it would take to drop the FIXME entirely.
> >> And if we need to keep the check, I'm a-ok risking false positives until we have
> >> a better understanding of why the check exists.
> > Kan Liang should be the best man who knows the history, but he has left
> > Intel. I would check this with other guys internally and look at if they
> > know the reason.
> 
> Just checked the commit history, It looks the reason of disabling guest
> PEBS here is to avoid breaking the host !exclude_guest PEBS event sampling.
> Host may create !exclude_guest event to profile both root and non-root
> mode, but it's conflicted with guest PEBS sampling in non-root mode. So
> guest PEBS sampling has to be disabled if there are active host PEBS
> events. Thanks.

But that doesn't make any sense, because the host can't use PEBS to sample non-root
mode due to the DS area being virtually addressed.  It's entirely possible that
was pure oversight, given that commit 58f6217e5d01 ("perf/x86/intel: KVM: Mask
PEBS_ENABLE loaded for guest with vCPU's value.") was necessary.

But I'm still not convinced: if that _really_ was the motivation, then I would
hope that scenario was at least smoke tested, and any testing whatsoever would
have crashed the guest.

Though given how buggy this code has been, I suppose it's plausible there was
simply testing.

  reply	other threads:[~2026-05-21 14:04 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-08 23:13 [PATCH v3 0/9] perf/x86: Don't write PEBS_ENABLED on KVM transitions Sean Christopherson
2026-05-08 23:13 ` [PATCH v3 1/9] perf/x86/intel: Ensure guest PEBS path doesn't set unwanted PERF_GLOBAL_CTRL bits Sean Christopherson
2026-05-08 23:40   ` sashiko-bot
2026-05-12 11:30     ` Mi, Dapeng
2026-05-15  0:01       ` Sean Christopherson
2026-05-15  1:49         ` Mi, Dapeng
2026-05-21 11:29           ` Mi, Dapeng
2026-05-21 14:04             ` Sean Christopherson [this message]
2026-05-22  2:26               ` Mi, Dapeng
2026-05-12  4:53   ` Mi, Dapeng
2026-05-08 23:13 ` [PATCH v3 2/9] perf/x86/intel: Don't write PEBS_ENABLED on host<=>guest xfers if CPU has isolation Sean Christopherson
2026-05-12  4:53   ` Mi, Dapeng
2026-05-08 23:13 ` [PATCH v3 3/9] perf/x86/intel: Don't context switch DS_AREA (and PEBS config) if PEBS is unused Sean Christopherson
2026-05-08 23:13 ` [PATCH v3 4/9] perf/x86/intel: Make @data a mandatory param for intel_guest_get_msrs() Sean Christopherson
2026-05-12 12:39   ` Jim Mattson
2026-05-08 23:13 ` [PATCH v3 5/9] perf/x86/intel: Invert names of intel_ctrl_{guest,host}_mask Sean Christopherson
2026-05-12  4:58   ` Mi, Dapeng
2026-05-08 23:13 ` [PATCH v3 6/9] perf/x86: KVM: Have perf define a dedicated struct for getting guest PEBS data Sean Christopherson
2026-05-08 23:13 ` [PATCH v3 7/9] perf/x86/intel: KVM: Handle cross-mapped PEBS PMCs entirely within KVM Sean Christopherson
2026-05-12  4:59   ` Mi, Dapeng
2026-05-08 23:13 ` [PATCH v3 8/9] KVM: VMX: Drop a redundant pmu->global_ctrl check when processing pebs_enable Sean Christopherson
2026-05-12  5:00   ` Mi, Dapeng
2026-05-08 23:13 ` [PATCH v3 9/9] KVM: VMX: Only tell perf to enable PEBS counters for fully enabled PMCs Sean Christopherson
2026-05-12  5:01   ` Mi, Dapeng

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