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Thu, 15 Oct 2026 11:53:05 +0000 Received: from JohnnyFan (unknown [172.21.64.24]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id C53B342C644D; Thu, 15 Oct 2026 19:53:03 +0800 (CST) Date: Thu, 15 Oct 2026 19:52:54 +0800 From: Johnny Fan To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, will@kernel.org, mark.rutland@arm.com, james.clark@linaro.org, leo.yan@arm.com, jeremy.linton@arm.com, cix-kernel-upstream@cixtech.com, bob.zhang@cixtech.com, jie.fu@cixtech.com, fugang.duan@cixtech.com Subject: Re: [PATCH] perf: arm_spe: Support heterogeneous ACPI systems Message-ID: References: <20261015062908.3565761-1-johnny.fan@cixtech.com> <86mrsf1bnv.wl-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <86mrsf1bnv.wl-maz@kernel.org> X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG2PEPF000B66CF:EE_|SEYPR06MB6108:EE_ X-MS-Office365-Filtering-Correlation-Id: c7227726-30ad-4ac9-3486-08df2ab2dfd4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|36860700016|82310400026|376014|1800799024|10067099003|22082099003|18002099003|4143699003|261009223027099003|56012099006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mMp4SPxpQ2oQeQXCT7AC2x7ntuSmJ3j30H8ARIaxTnnEPmUWFEz+d89p9ibi9y2d68QD9RbEsEBvD5EtSOMX2Mt90FZXCH8wDmb0vIW5J7jEYyASVu7cQZ+TWh6UXoqmKgfj+stkORuhVtqRJSnmwthET2HXjY4hO4xtvwRTzaxZd5LclEXpkHVh3DrkMwidlr83cuO//FXx67r7FKHPjIrhSZGa6DCVISkbk3r4Lm8Jtr2GdFH9+JJrsgUzoXqQ4LX5NbbWNjVJtNL3ysGfgs6/eBCHIu9YxqIDcCUI9qpJrsWxoYxRMXijgeMRGJBipzHqspps5ROXUChC0d0MjVRaGTvrqToxtACZKNSf3v33ssqB/6zaEMPFjIKRCgZmYhDYMMUFNA4RAC+EOmCjrTd3Gl5ChNLLx4RM63QN9ZitDjGtA77QhR+p4lVgflEK X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Oct 2026 11:53:05.5975 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c7227726-30ad-4ac9-3486-08df2ab2dfd4 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SG2PEPF000B66CF.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEYPR06MB6108 On Thu, Oct 15, 2026 at 11:49:24AM +0100, Marc Zyngier wrote: > This is a bit odd: at the beginning, you are stating that the SPE > interrupt being 0 is an indication of SPE not being supported. Then > you check for PMSVer for the same properly. This seems pretty wrong. > > It should be possible to build the mask of SPE-enabled CPUs without > IPI-ing the other CPUs, and only rely on the firmware table. Agreed. The MADT walk already tells us which CPUs implement SPE, so the whole PMSVer probing (including the hotplug compensation for CPUs that were offline at probe time) can go away: the driver already consumes platform_get_irq_affinity(), so once the mask comes from the GICC entries it needs no changes at all. > This "optional" parameter feels very wrong. We now have an > infrastructure to get a set of affinities for an interrupt (see > 5324fe21ba9b7 and following patches). What this needs is ACPI to be > plumbed into this. > > Unfortunately, ACPI is awkward and very badly abstracted in this area, > but that doesn't mean we should make the driver code more bizarre. > > Treating SPE and TRBE differently is just as odd, and there is no > reason to do other than suiting your particular platform. Also agreed -- the TRBE overflow interrupt has the same per-CPU semantics in the GICC, so both devices can share one code path: build the mask of CPUs reporting a non-zero interrupt, and require a single GSI across that mask. The current hetid check is replaced by the GSI consistency check. The part I'm unsure about is how to convey the MADT-derived mask to platform_get_irq_affinity() for these devices: they are synthesized by arm_pmu_acpi.c without an fwnode, so neither the of_node path nor the _CRS-based ACPI path can reach them. Would you rather see the mask registered with the GIC domain keyed by GSI, with a fallback in get_irq_affinity() that resolves by IRQ number, or something simpler at the platform_device level? Happy to implement whichever shape you prefer. Thanks, Johnny