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Fri, 16 Oct 2026 03:24:25 +0000 Received: from JohnnyFan (unknown [172.21.64.24]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id 9604C42C6441; Fri, 16 Oct 2026 11:24:24 +0800 (CST) Date: Fri, 16 Oct 2026 11:24:23 +0800 From: Johnny Fan To: Leo Yan Cc: Marc Zyngier , will@kernel.org, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, james.clark@linaro.org, jeremy.linton@arm.com, cix-kernel-upstream@cixtech.com, bob.zhang@cixtech.com, jie.fu@cixtech.com, Fugang Duan Subject: Re: [PATCH] perf: arm_spe: Support heterogeneous ACPI systems Message-ID: References: <20261015062908.3565761-1-johnny.fan@cixtech.com> <86mrsf1bnv.wl-maz@kernel.org> <20261015141926.GC26205@e132581.arm.com> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261015141926.GC26205@e132581.arm.com> X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG2PEPF000B66CB:EE_|TYNPR06MB8452:EE_ X-MS-Office365-Filtering-Correlation-Id: 5281a5df-c820-4092-1d64-08df2b34fac8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|23010399003|36860700016|56012099006|4143699003|22082099003|18002099003|6133799003|10067099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rJYUZ3idnNMj/tdlf8TF85dZusqIeAaRFtUIF5X7feIrn+80s3XIcdf0/AD/90pbIDkY/rzqI9ZmEtecRjhoKe0/NWUxh954lNJsb8IF/H7EMd10MJ6L6hjCxCT981mjINss8d43wGiOmXfVQ7SVrItNxf9DG0i/62Z22YvCY46J8Ir5eTPwFN8QgbAvtpBiuBsU0NO8JGcIQaMTZCGfzREymxG5V78J9IEzcUaBwL+L9s53Xp85JMKNddaCloKqUqImtM6Jc9auK9Ob/wU3UOuHE0vxXLom3bLn03DPtYu4/LoEi3X/wVU5enmI22F4m9ae8N1WTk0vzu2B5prcUiQ5a4dm1JLNVfREwKdcbG8wTrA37O+2gajXbTJJGbLGoQ5zdhm6MmWIECzvM3/d8W6bpNg2BjVrPgqYtceXeQ1LEENpMnIC0HKIw3IBhHGw X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2026 03:24:25.3806 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5281a5df-c820-4092-1d64-08df2b34fac8 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SG2PEPF000B66CB.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYNPR06MB8452 On Thu, Oct 15, 2026 at 03:19:26PM +0100, Leo Yan wrote: > The SPE driver probes its capabilities on one CPU selected by > smp_call_function_any(), then performs local setup on every CPU in > supported_cpus. It therefore relies on that mask being accurate; > including a CPU without SPE could lead to accesses to unimplemented > SPE system registers. Right. On ACPI the driver gets no affinity information for this device, so supported_cpus falls back to cpu_possible_mask. That only works today because registration is limited to homogeneous systems. The PMSVer trimming in this patch works around the heterogeneous case; with the mask taken from the MADT walk, both go away. > There is also a grouping question for SPE and TRBE. If all participating > CPUs implement the feature, but have different capabilities, should ACPI > registration create separate platform devices for the compatible CPU > groups? DT can describe separate CPU subsets using PPI partitions [1]. > That ACPI cannot describe: the GICC only carries a per-CPU interrupt number, so CPUs with different capabilities reporting the same GSI cannot be told apart, short of probing PMSVer. Such a split would have to come from hardware wiring each group to a distinct PPI. For now I'd keep it to a single GSI, and leave grouping to be revisited if hardware that needs it ever shows up. Thanks, Johnny