From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E212223909F; Tue, 28 Jul 2026 15:07:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785251272; cv=none; b=hppj8fm1LaTTfFhsvDDc+xq6JP7A/CivSsEJr9vUEXW+rY2034LkXwqB8FmHLE3qfnWUhsQMjdHNF6qMHUFImxMBMJJVA9O2b72yYCPlBr4Z+5QVSlSCwUdloAMOEZyuvHaqWJxeYAyVxi+fi8O+csrQ4WvtGey/G+KNySnx1Ro= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785251272; c=relaxed/simple; bh=BD1LV6gEweEYUjcl9ARIkRkGvDhvtnv+9e/uvIhdghI=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=fmZOKzbvpeKXq23rN30V9fPkL0XpthsKEMUqOF7lnV9m/+S++TVUBr/IE2x0vBBqlEhE5mfVNKBKGrOBEZJ/NDkA2pmpOUkAdmHtQehOoEab8jhQtKWx7l6/xEOoobC7h5W4W6r3LqGU/AtkZWwrlE1l0KFi6t901/dqQklc5AA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=p/2GpzZ5; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="p/2GpzZ5" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2BF3B169E; Tue, 28 Jul 2026 08:07:46 -0700 (PDT) Received: from [10.2.212.23] (e121345-lin.cambridge.arm.com [10.2.212.23]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0824B3F66F; Tue, 28 Jul 2026 08:07:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785251270; bh=BD1LV6gEweEYUjcl9ARIkRkGvDhvtnv+9e/uvIhdghI=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=p/2GpzZ5F0kbQ5EoZfBqT6yq53KWffSqkwhsIwKSHFzBhk0XWz3iHGtbOpnwKHDaR +mZWUXOg8abFit3hXggkmWfs+gpD13GREcrsMwRHMljNbkHBS+FeDf/VC9w1pW9RMp idzWRxlG6MXIBei4T3i++d8CNJbO219W9tqEu8Ng= Message-ID: Date: Tue, 28 Jul 2026 16:07:44 +0100 Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/21] perf: arm_pmuv3: Check cntr_mask before using pmccntr To: Colton Lewis , kvm@vger.kernel.org Cc: Alexandru Elisei , Paolo Bonzini , Jonathan Corbet , Russell King , Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , Mingwei Zhang , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Mark Rutland , Shuah Khan , Ganapatrao Kulkarni , James Clark , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-perf-users@vger.kernel.org, linux-kselftest@vger.kernel.org References: <20260612192909.1153907-1-coltonlewis@google.com> <20260612192909.1153907-6-coltonlewis@google.com> From: Robin Murphy Content-Language: en-GB In-Reply-To: <20260612192909.1153907-6-coltonlewis@google.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 12/06/2026 8:28 pm, Colton Lewis wrote: > Check cntr_mask before using pmccntr to ensure it's available. With a > partitioned PMU, there may be instances where pmccntr is being used by > the guest and will be absent from cntr_mask. > > Signed-off-by: Colton Lewis > --- > drivers/perf/arm_pmuv3.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c > index 1cceb1f614515..17bb1cfdc271c 100644 > --- a/drivers/perf/arm_pmuv3.c > +++ b/drivers/perf/arm_pmuv3.c > @@ -1028,7 +1028,8 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc, > > /* Always prefer to place a cycle counter into the cycle counter. */ > if (armv8pmu_can_use_pmccntr(cpuc, event)) { Something smells wrong here - we can use PMCCNTR but we can't? > - if (!test_and_set_bit(ARMV8_PMU_CYCLE_IDX, cpuc->used_mask)) > + if (test_bit(ARMV8_PMU_CYCLE_IDX, cpu_pmu->cntr_mask) && ...i.e. this test would seem to belong in the helper function. > + !test_and_set_bit(ARMV8_PMU_CYCLE_IDX, cpuc->used_mask)) > return ARMV8_PMU_CYCLE_IDX; > else if (armv8pmu_event_is_64bit(event) && > armv8pmu_event_want_user_access(event) && Plus it also doesn't make much sense to fall through to the "we _could_ accommodate this event if only PMCCNTR was free" case here if we know PMCCNTR can never be free because it's not even available. Thanks, Robin.