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From: "Liang, Kan" <kan.liang@linux.intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	linux-cxl@vger.kernel.org, peterz@infradead.org
Cc: mingo@redhat.com, acme@kernel.org, mark.rutland@arm.com,
	will@kernel.org, dan.j.williams@intel.com, linuxarm@huawei.com,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	Davidlohr Bueso <dave@stgolabs.net>,
	Dave Jiang <dave.jiang@intel.com>
Subject: Re: [PATCH v4 5/5] docs: perf: Minimal introduction the the CXL PMU device and driver
Date: Mon, 3 Apr 2023 13:45:52 -0400	[thread overview]
Message-ID: <bf9ef54d-65da-ce59-3b47-f3dc29a5e052@linux.intel.com> (raw)
In-Reply-To: <20230330164556.31533-6-Jonathan.Cameron@huawei.com>



On 2023-03-30 12:45 p.m., Jonathan Cameron wrote:
> Very basic introduction to the device and the current driver support
> provided. I expect to expand on this in future versions of this patch
> set.
> 
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> --
> v4: No change
> ---
>  Documentation/admin-guide/perf/cxl.rst   | 65 ++++++++++++++++++++++++
>  Documentation/admin-guide/perf/index.rst |  1 +
>  2 files changed, 66 insertions(+)
> 
> diff --git a/Documentation/admin-guide/perf/cxl.rst b/Documentation/admin-guide/perf/cxl.rst
> new file mode 100644
> index 000000000000..46235dff4b21
> --- /dev/null
> +++ b/Documentation/admin-guide/perf/cxl.rst
> @@ -0,0 +1,65 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +======================================
> +CXL Performance Monitoring Unit (CPMU)
> +======================================
> +
> +The CXL rev 3.0 specification provides a definition of CXL Performance
> +Monitoring Unit in section 13.2: Performance Monitoring.
> +
> +CXL components (e.g. Root Port, Switch Upstream Port, End Point) may have
> +any number of CPMU instances. CPMU capabilities are fully discoverable from
> +the devices. The specification provides event definitions for all CXL protocol
> +message types and a set of additional events for things commonly counted on
> +CXL devices (e.g. DRAM events).
> +
> +CPMU driver
> +===========
> +
> +The CPMU driver register a perf PMU with the name cpmu<id> on the CXL bus.
> +
> +    /sys/bus/cxl/device/cpmu<id>
> +
> +The associated PMU is registered as
> +
> +   /sys/bus/event_sources/devices/cpmu<id>
> +
> +In common with other CXL bus devices, the id has no specific meaning and the
> +relationship to specific CXL device should be established via the device parent
> +of the device on the CXL bus.
> +
> +PMU driver provides description of available events and filter options in sysfs.
> +
> +The "format" directory describes all formats of the config (event vendor id,
> +group id and mask) config1 (threshold, filter enables) and config2 (filter
> +parameters) fields of the perf_event_attr structure.  The "events" directory
> +describes all documented events show in perf list.
> +
> +The events shown in perf list are the most fine grained events with a single
> +bit of the event mask set. More general events may be enable by setting
> +multiple mask bits in config. For example, all Device to Host Read Requests
> +may be captured on a single counter by setting the bits for all of
> +
> +* d2h_req_rdcurr
> +* d2h_req_rdown
> +* d2h_req_rdshared
> +* d2h_req_rdany
> +* d2h_req_rdownnodata
> +
> +Example of usage::
> +
> +  $#perf list
> +  cpmu0/clock_ticks/                                 [Kernel PMU event]
> +  cpmu0/d2h_req_itomwr/                              [Kernel PMU event]
> +  cpmu0/d2h_req_rdany/                               [Kernel PMU event]
> +  cpmu0/d2h_req_rdcurr/                              [Kernel PMU event]
> +  -----------------------------------------------------------
> +
> +  $# perf stat -e cpmu0/clock_ticks/ -e cpmu0/d2h_req_itowrm/
> +
> +Vendor specific events may also be available and if so can be used via
> +
> +  $# perf stat -e cpmu0/vid=VID,gid=GID,mask=MASK/
> +
> +The driver does not support sampling. So "perf record" and attaching to
> +a task are unsupported.

The PMU only supports system-wide counting. That's the reason it doesn't
support per-task profiling. Not because of missing sampling.

Thanks,
Kan
> diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst
> index 9de64a40adab..f60be04e4e33 100644
> --- a/Documentation/admin-guide/perf/index.rst
> +++ b/Documentation/admin-guide/perf/index.rst
> @@ -21,3 +21,4 @@ Performance monitor support
>     alibaba_pmu
>     nvidia-pmu
>     meson-ddr-pmu
> +   cxl

  reply	other threads:[~2023-04-03 17:49 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-30 16:45 [PATCH v4 0/5] CXL 3.0 Performance Monitoring Unit support Jonathan Cameron
2023-03-30 16:45 ` [PATCH v4 1/5] cxl: Add function to count regblocks of a given type Jonathan Cameron
2023-04-04  3:59   ` Dan Williams
2023-03-30 16:45 ` [PATCH v4 2/5] perf: Allow a PMU to have a parent Jonathan Cameron
2023-04-04  4:03   ` Dan Williams
2023-03-30 16:45 ` [PATCH v4 3/5] cxl/pci: Find and register CXL PMU devices Jonathan Cameron
2023-04-04 19:17   ` Dan Williams
2023-04-05 10:48     ` Jonathan Cameron
2023-03-30 16:45 ` [PATCH v4 4/5] cxl: CXL Performance Monitoring Unit driver Jonathan Cameron
2023-04-03 17:32   ` Liang, Kan
2023-04-04 16:48     ` Jonathan Cameron
2023-04-04 21:53   ` Dan Williams
2023-04-05 16:08     ` Jonathan Cameron
2023-04-05 19:26       ` Dan Williams
2023-03-30 16:45 ` [PATCH v4 5/5] docs: perf: Minimal introduction the the CXL PMU device and driver Jonathan Cameron
2023-04-03 17:45   ` Liang, Kan [this message]
2023-04-04 16:55     ` Jonathan Cameron
2023-04-04 22:24   ` Dan Williams
2023-04-06 16:33     ` Jonathan Cameron
2023-04-04  3:55 ` [PATCH v4 0/5] CXL 3.0 Performance Monitoring Unit support Dan Williams
2023-04-11 13:21   ` Jonathan Cameron

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