From: Adrian Hunter <adrian.hunter@intel.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
linux-perf-users@vger.kernel.org
Subject: Re: [PATCH 09/10] perf intel pt: Add new JMPABS instruction to the Intel PT instruction decoder
Date: Tue, 28 May 2024 21:14:31 +0300 [thread overview]
Message-ID: <cb1bdaab-d324-44d8-a14e-dc48e19503fa@intel.com> (raw)
In-Reply-To: <20240502105853.5338-10-adrian.hunter@intel.com>
On 2/05/24 13:58, Adrian Hunter wrote:
> JMPABS is 64-bit absolute direct jump instruction, encoded with a mandatory
> REX2 prefix. JMPABS is designed to be used in the procedure linkage table
> (PLT) to replace indirect jumps, because it has better performance. In that
> case the jump target will be amended at run time. To enable Intel PT to
> follow the code, a TIP packet is always emitted when JMPABS is traced under
> Intel PT.
>
> Refer to the Intel Advanced Performance Extensions (Intel APX) Architecture
> Specification for details.
>
> Decode JMPABS as an indirect jump, because it has an associated TIP packet
> the same as an indirect jump and the control flow should follow the TIP
> packet payload, and not assume it is the same as the on-file object code
> JMPABS target address.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Patches 1-8 are in perf-tools-next now, so this and patch 10
could be applied.
> ---
> tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
> index c5d57027ec23..4407130d91f8 100644
> --- a/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
> +++ b/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
> @@ -92,6 +92,15 @@ static void intel_pt_insn_decoder(struct insn *insn,
> op = INTEL_PT_OP_JCC;
> branch = INTEL_PT_BR_CONDITIONAL;
> break;
> + case 0xa1:
> + if (insn_is_rex2(insn)) { /* jmpabs */
> + intel_pt_insn->op = INTEL_PT_OP_JMP;
> + /* jmpabs causes a TIP packet like an indirect branch */
> + intel_pt_insn->branch = INTEL_PT_BR_INDIRECT;
> + intel_pt_insn->length = insn->length;
> + return;
> + }
> + break;
> case 0xc2: /* near ret */
> case 0xc3: /* near ret */
> case 0xca: /* far ret */
next prev parent reply other threads:[~2024-05-28 18:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-02 10:58 [PATCH 00/10] perf intel pt: Update instruction decoder for APX and other new instructions Adrian Hunter
2024-05-02 10:58 ` [PATCH 01/10] x86/insn: Add Key Locker instructions to the opcode map Adrian Hunter
2024-05-02 10:58 ` [PATCH 02/10] x86/insn: Fix PUSH instruction in x86 instruction decoder " Adrian Hunter
2024-05-02 13:41 ` Arnaldo Carvalho de Melo
2024-05-02 19:11 ` Adrian Hunter
2024-05-02 10:58 ` [PATCH 03/10] x86/insn: Add VEX versions of VPDPBUSD, VPDPBUSDS, VPDPWSSD and VPDPWSSDS Adrian Hunter
2024-05-02 10:58 ` [PATCH 04/10] x86/insn: Add misc new Intel instructions Adrian Hunter
2024-05-02 10:58 ` [PATCH 05/10] x86/insn: Add support for REX2 prefix to the instruction decoder logic Adrian Hunter
2024-05-02 18:10 ` Ian Rogers
2024-05-03 5:09 ` Adrian Hunter
2024-05-02 10:58 ` [PATCH 06/10] x86/insn: x86/insn: Add support for REX2 prefix to the instruction decoder opcode map Adrian Hunter
2024-05-02 10:58 ` [PATCH 07/10] x86/insn: Add support for APX EVEX to the instruction decoder logic Adrian Hunter
2024-05-02 10:58 ` [PATCH 08/10] x86/insn: Add support for APX EVEX instructions to the opcode map Adrian Hunter
2024-05-02 10:58 ` [PATCH 09/10] perf intel pt: Add new JMPABS instruction to the Intel PT instruction decoder Adrian Hunter
2024-05-28 18:14 ` Adrian Hunter [this message]
2024-06-18 8:05 ` Adrian Hunter
2024-05-02 10:58 ` [PATCH 10/10] perf tests: Add APX and other new instructions to x86 instruction decoder test Adrian Hunter
2024-06-26 3:59 ` (subset) [PATCH 00/10] perf intel pt: Update instruction decoder for APX and other new instructions Namhyung Kim
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