From: Clement LE GOFFIC <clement.legoffic@foss.st.com>
To: Julius Werner <jwerner@chromium.org>
Cc: Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Jonathan Corbet <corbet@lwn.net>,
Gatien Chevallier <gatien.chevallier@foss.st.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Gabriel Fernandez <gabriel.fernandez@foss.st.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Le Goffic <legoffic.clement@gmail.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-perf-users@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-clk@vger.kernel.org>
Subject: Re: [PATCH v4 05/20] dt-bindings: memory: factorise LPDDR props into SDRAM props
Date: Fri, 25 Jul 2025 09:06:33 +0200 [thread overview]
Message-ID: <ce0cb3ba-2373-479f-a8f3-3a89ffb0a1b1@foss.st.com> (raw)
In-Reply-To: <CAODwPW9drKEAMfQvQHV8eMTyf5KCHB4SN400JiUs0pgjoXy=sw@mail.gmail.com>
Hi Julius,
On 7/25/25 00:33, Julius Werner wrote:
>>> I don't think this will identify a part unambiguously, I would expect
>>> the DDR revision ID to be specific to the part number. (In fact, we're
>>> also not sure whether manufacturer+revision identifies LPDDR parts
>>> unambiguously for every vendor, we just didn't have anything more to
>>> work with there.) I would suggest to use either `ddrX-YYYY,AAA...,ZZ`
>>> or `ddrX-YYYY,ZZ,AAA...` (where AAA... is the part number string from
>>> SPD 329-348 without the trailing spaces). The first version looks a
>>> bit more natural but it might get confusing on the off chance that
>>> someone uses a comma in a part number string.
>>
>> The first one seems better indeed.
>> If the manufacturer put a comma in the part number we should handle it
>> at a software level to me and if it is a devicetree error it is up to
>> the devicetree writer to fix it.
>> What do you think ?
I meant exactly what you are stating below :-)
>
> Not sure what you mean by "handle it at a software level"? Using comma
> characters in the part number is not illegal according to the SPD
> spec, as far as I can tell.
>
> That said, it is still possible to disambiguate this as long as the
> revision number is always there, you just have to look for the last
> comma from the end (so e.g. the string `ddr4-1234,some,part,567,89`
> could be unambiguously parsed as manufacturer ID 0x1234, part number
> `some,part,567` and revision ID 0x89, the parsing code just needs to
> be a bit careful). So maybe this is not actually a problem.
Best regards,
Clément
next prev parent reply other threads:[~2025-07-25 7:09 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-23 13:05 [PATCH v4 00/20] Introduce STM32 DDR PMU for STM32MP platforms Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 01/20] bus: firewall: move stm32_firewall header file in include folder Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 02/20] dt-bindings: stm32: stm32mp25: add `access-controller-cell` property Clément Le Goffic
2025-07-23 13:41 ` Rob Herring
2025-07-23 13:49 ` Clement LE GOFFIC
2025-07-23 13:05 ` [PATCH v4 03/20] clk: stm32mp25: add firewall grant_access ops Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 04/20] arm64: dts: st: set rcc as an access-controller Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 05/20] dt-bindings: memory: factorise LPDDR props into SDRAM props Clément Le Goffic
2025-07-23 21:48 ` Julius Werner
2025-07-24 8:14 ` Clement LE GOFFIC
2025-07-24 22:33 ` Julius Werner
2025-07-25 7:06 ` Clement LE GOFFIC [this message]
2025-07-23 13:05 ` [PATCH v4 06/20] dt-bindings: memory: introduce DDR4 Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 07/20] dt-bindings: memory: factorise LPDDR channel binding into SDRAM channel Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 08/20] dt-binding: memory: add DDR4 channel compatible Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 09/20] dt-bindings: memory: SDRAM channel: standardise node name Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 10/20] arm64: dts: st: add LPDDR channel to stm32mp257f-dk board Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 11/20] arm64: dts: st: add DDR channel to stm32mp257f-ev1 board Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 12/20] dt-bindings: perf: stm32: introduce DDRPERFM dt-bindings Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 13/20] perf: stm32: introduce DDRPERFM driver Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 14/20] Documentation: perf: stm32: add ddrperfm support Clément Le Goffic
2025-07-23 13:05 ` [PATCH v4 15/20] MAINTAINERS: add myself as STM32 DDR PMU maintainer Clément Le Goffic
2025-07-23 13:06 ` [PATCH v4 16/20] ARM: dts: stm32: add ddrperfm on stm32mp131 Clément Le Goffic
2025-07-23 13:06 ` [PATCH v4 17/20] ARM: dts: stm32: add ddrperfm on stm32mp151 Clément Le Goffic
2025-07-23 13:06 ` [PATCH v4 18/20] arm64: dts: st: add ddrperfm on stm32mp251 Clément Le Goffic
2025-07-23 13:06 ` [PATCH v4 19/20] arm64: dts: st: support ddrperfm on stm32mp257f-dk Clément Le Goffic
2025-07-23 13:06 ` [PATCH v4 20/20] arm64: dts: st: support ddrperfm on stm32mp257f-ev1 Clément Le Goffic
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