From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: "Xin Li (Intel)" <xin@zytor.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
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kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
Subject: Re: [PATCH v3 09/14] x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
Date: Sun, 27 Apr 2025 17:21:08 +0800 [thread overview]
Message-ID: <d2bdd61d-cab6-401f-9b6a-17b28f3cd19c@linux.intel.com> (raw)
In-Reply-To: <20250425083442.2390017-10-xin@zytor.com>
On 4/25/2025 4:34 PM, Xin Li (Intel) wrote:
> hpa found that pmu_msr_write() is actually a completely pointless
> function [1]: all it does is shuffle some arguments, then calls
> pmu_msr_chk_emulated() and if it returns true AND the emulated flag
> is clear then does *exactly the same thing* that the calling code
> would have done if pmu_msr_write() itself had returned true. And
> pmu_msr_read() does the equivalent stupidity.
>
> Remove the calls to native_{read,write}_msr{,_safe}() within
> pmu_msr_{read,write}(). Instead reuse the existing calling code
> that decides whether to call native_{read,write}_msr{,_safe}() based
> on the return value from pmu_msr_{read,write}(). Consequently,
> eliminate the need to pass an error pointer to pmu_msr_{read,write}().
>
> While at it, refactor pmu_msr_write() to take the MSR value as a u64
> argument, replacing the current dual u32 arguments, because the dual
> u32 arguments were only used to call native_write_msr{,_safe}(), which
> has now been removed.
>
> [1]: https://lore.kernel.org/lkml/0ec48b84-d158-47c6-b14c-3563fd14bcc4@zytor.com/
>
> Suggested-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> Sign-off-by: Xin Li (Intel) <xin@zytor.com>
> ---
>
> Change in v3:
> *) Rename pmu_msr_{read,write}() to pmu_msr_{read,write}_emulated()
> (Dapeng Mi).
> *) Fix a pmu_msr_read() callsite with wrong arguments (Dapeng Mi).
> ---
> arch/x86/xen/enlighten_pv.c | 8 ++++++--
> arch/x86/xen/pmu.c | 27 ++++-----------------------
> arch/x86/xen/xen-ops.h | 4 ++--
> 3 files changed, 12 insertions(+), 27 deletions(-)
>
> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
> index 846b5737d320..61e51a970f3c 100644
> --- a/arch/x86/xen/enlighten_pv.c
> +++ b/arch/x86/xen/enlighten_pv.c
> @@ -1090,7 +1090,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
> {
> u64 val = 0; /* Avoid uninitialized value for safe variant. */
>
> - if (pmu_msr_read(msr, &val, err))
> + if (pmu_msr_read_emulated(msr, &val))
> return val;
>
> if (err)
> @@ -1132,6 +1132,8 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,
> static void xen_do_write_msr(unsigned int msr, unsigned int low,
> unsigned int high, int *err)
> {
> + u64 val;
> +
> switch (msr) {
> case MSR_FS_BASE:
> set_seg(SEGBASE_FS, low, high, err);
> @@ -1158,7 +1160,9 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
> break;
>
> default:
> - if (!pmu_msr_write(msr, low, high, err)) {
> + val = (u64)high << 32 | low;
> +
> + if (!pmu_msr_write_emulated(msr, val)) {
> if (err)
> *err = native_write_msr_safe(msr, low, high);
> else
> diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
> index 9c1682af620a..b6557f2d1a2e 100644
> --- a/arch/x86/xen/pmu.c
> +++ b/arch/x86/xen/pmu.c
> @@ -313,37 +313,18 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
> return true;
> }
>
> -bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
> +bool pmu_msr_read_emulated(u32 msr, u64 *val)
> {
> bool emulated;
>
> - if (!pmu_msr_chk_emulated(msr, val, true, &emulated))
> - return false;
> -
> - if (!emulated) {
> - *val = err ? native_read_msr_safe(msr, err)
> - : native_read_msr(msr);
> - }
> -
> - return true;
> + return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
> }
>
> -bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
> +bool pmu_msr_write_emulated(u32 msr, u64 val)
> {
> - uint64_t val = ((uint64_t)high << 32) | low;
> bool emulated;
>
> - if (!pmu_msr_chk_emulated(msr, &val, false, &emulated))
> - return false;
> -
> - if (!emulated) {
> - if (err)
> - *err = native_write_msr_safe(msr, low, high);
> - else
> - native_write_msr(msr, low, high);
> - }
> -
> - return true;
> + return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
> }
>
> static u64 xen_amd_read_pmc(int counter)
> diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
> index 735f58780704..163e03e33089 100644
> --- a/arch/x86/xen/xen-ops.h
> +++ b/arch/x86/xen/xen-ops.h
> @@ -274,8 +274,8 @@ void xen_pmu_finish(int cpu);
> static inline void xen_pmu_init(int cpu) {}
> static inline void xen_pmu_finish(int cpu) {}
> #endif
> -bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
> -bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
> +bool pmu_msr_read_emulated(u32 msr, u64 *val);
> +bool pmu_msr_write_emulated(u32 msr, u64 val);
> int pmu_apic_update(uint32_t reg);
> u64 xen_read_pmc(int counter);
>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
next prev parent reply other threads:[~2025-04-27 9:21 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-25 8:34 [PATCH v3 00/14] MSR code cleanup part one Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 01/14] x86/msr: Move rdtsc{,_ordered}() to <asm/tsc.h> Xin Li (Intel)
2025-04-25 15:45 ` Ilpo Järvinen
2025-04-26 7:27 ` Xin Li
2025-04-26 13:45 ` Ilpo Järvinen
2025-04-25 8:34 ` [PATCH v3 02/14] x86/msr: Remove rdpmc() Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 03/14] x86/msr: Rename rdpmcl() to rdpmc() Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 04/14] x86/msr: Convert the rdpmc() macro into an always inline function Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 05/14] x86/msr: Return u64 consistently in Xen PMC read functions Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 06/14] x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 07/14] x86/msr: Add the native_rdmsrq() helper Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 08/14] x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 09/14] x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}() Xin Li (Intel)
2025-04-25 9:55 ` Jürgen Groß
2025-04-27 9:21 ` Mi, Dapeng [this message]
2025-04-27 9:26 ` Xin Li
2025-04-25 8:34 ` [PATCH v3 10/14] x86/xen/msr: Remove pmu_msr_{read,write}() Xin Li (Intel)
2025-04-25 10:08 ` Jürgen Groß
2025-04-26 7:40 ` Xin Li
2025-04-25 8:34 ` [PATCH v3 11/14] x86/xen/msr: Remove the error pointer argument from set_seg() Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 12/14] x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}() Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 13/14] x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low) Xin Li (Intel)
2025-04-25 8:34 ` [PATCH v3 14/14] x86/msr: Change the function type of native_read_msr_safe() Xin Li (Intel)
2025-04-25 12:52 ` [PATCH v3 00/14] MSR code cleanup part one Peter Zijlstra
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