Re: [Patch v3 4/4] perf/x86/intel: Consolidate MSR_IA32_PERF_CFG_C tracking

Peter Zijlstra
2026-04-28T13:00:48Z

On Mon, Apr 27, 2026 at 04:55:13PM +0800, Dapeng Mi wrote:
> Both Auto Counter Reload (ACR) and Architectural PEBS use the PERF_CFG_C
> MSRs to configure event behavior. Currently, the driver maintains two
> independent variables acr_cfg_c and cfg_c_val to cache the values intended
> for these MSRs.
>
> Using separate variables to track a single hardware register state is
> error-prone and can lead to configuration conflicts. Consolidate the
> tracking into a single cfg_c_val variable to ensure a unified and
> consistent view of the PERF_CFG_C MSR state.
>
> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>

So the earlier patches deserve to be in perf/urgent, but this one
doesn't actually fix anything and goes in perf/core ?