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a="1959288" X-IronPort-AV: E=Sophos;i="6.27,185,1787036400"; d="scan'208";a="1959288" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2026 18:06:06 -0700 X-CSE-ConnectionGUID: jS8f0Es1Q++CCTFH2k3MvQ== X-CSE-MsgGUID: urQzugNAT/yIaoAkD4Uu0g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,185,1787036400"; d="scan'208";a="5421084" Received: from unknown (HELO [10.238.2.61]) ([10.238.2.61]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2026 18:06:01 -0700 Message-ID: Date: Fri, 30 Oct 2026 09:05:59 +0800 X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [Patch v5 10/18] perf/x86/intel: Allow LBR read helpers to operate on explicit stacks To: Peter Zijlstra Cc: Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane , Sandipan Das , Andrii Nakryiko , Song Liu , Ravi Bangoria , Ananth Narayan , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, bpf@vger.kernel.org, Dapeng Mi , Zide Chen , Falcon Thomas , Xudong Hao References: <20261029043914.1395147-1-dapeng1.mi@linux.intel.com> <20261029043914.1395147-11-dapeng1.mi@linux.intel.com> <20261029103857.GL1779021@noisy.programming.kicks-ass.net> Content-Language: en-US From: "Mi, Dapeng" In-Reply-To: <20261029103857.GL1779021@noisy.programming.kicks-ass.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/29/2026 6:38 PM, Peter Zijlstra wrote: > On Thu, Oct 29, 2026 at 12:39:06PM +0800, Dapeng Mi wrote: >> diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c >> index ee724b28d90c..63f0504f9d2a 100644 >> --- a/arch/x86/events/intel/lbr.c >> +++ b/arch/x86/events/intel/lbr.c >> @@ -105,7 +105,10 @@ >> >> #define ARCH_LBR_CTL_MASK 0x7f000e >> >> -static void intel_pmu_lbr_filter(struct cpu_hw_events *cpuc); >> +static void intel_pmu_lbr_filter(struct cpu_hw_events *cpuc, >> + struct perf_branch_stack *lbr_stack, >> + struct perf_branch_entry *lbr_entries, >> + u64 *lbr_counters); >> >> static __always_inline bool is_lbr_call_stack_bit_set(u64 config) >> { >> @@ -741,10 +744,12 @@ void intel_pmu_lbr_disable_all(void) >> } >> } >> >> -void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc) >> +void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc, >> + struct perf_branch_stack *lbr_stack, >> + struct perf_branch_entry *lbr_entries) >> { >> unsigned long mask = x86_pmu.lbr_nr - 1; >> - struct perf_branch_entry *br = cpuc->lbr_entries; >> + struct perf_branch_entry *br = lbr_entries; >> u64 tos = intel_pmu_lbr_tos(); >> int i; >> >> @@ -775,11 +780,13 @@ void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc) >> * is the same as the linear address, allowing us to merge the LIP and EIP >> * LBR formats. >> */ >> -void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) >> +void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc, >> + struct perf_branch_stack *lbr_stack, >> + struct perf_branch_entry *lbr_entries) >> { >> bool need_info = false, call_stack = false; >> unsigned long mask = x86_pmu.lbr_nr - 1; >> - struct perf_branch_entry *br = cpuc->lbr_entries; >> + struct perf_branch_entry *br = lbr_entries; >> u64 tos = intel_pmu_lbr_tos(); >> int i; >> int out = 0; > This makes no sense; why do you keep passing lbr_entries around when we > have lbr_stack.entries[] ? Yeah, that's actually what I did at the beginning. But sashiko raised the warning below. :( " Does this trigger a CONFIG_UBSAN_BOUNDS panic when intel_pmu_store_lbr() is inlined? The lbr_stack pointer points to a struct perf_branch_stack embedded directly in struct cpu_hw_events. Because it is an embedded value-type struct, the compiler considers its size to be fixed (16 bytes), treating the trailing flexible array member entries[] as having 0 elements. Accessing lbr_stack->entries[i] where i >= 0 can trigger strict array bounds violations under -fstrict-flex-arrays=3 and CONFIG_UBSAN_BOUNDS. "