Re: [PATCH RESEND v7 00/21] drivers/perf: apple_m1: Add Apple A7-A11, T2 SoC support

[Nick Chan <towinchenmi@gmail.com>]

Ian Rogers 於 2025/6/16 下晝5:36 寫道:
> On Sun, Jun 15, 2025 at 6:32 PM Nick Chan <towinchenmi@gmail.com> wrote:
>> This series adds support for the CPU PMU in the older Apple A7-A11, T2
>> SoCs. These PMUs may have a different event layout, less counters, or
>> deliver their interrupts via IRQ instead of a FIQ. Since some of those
>> older SoCs support 32-bit EL0, counting for 32-bit EL0 also need to
>> be enabled by the driver where applicable.
>>
>> Patch 1 adds the DT bindings.
>> Patch 2-7 prepares the driver to allow adding support for those
>> older SoCs.
>> Patch 8-12 adds support for the older SoCs.
>> Patch 13-21 are the DT changes.
>>
>> Signed-off-by: Nick Chan <towinchenmi@gmail.com>
> Hi Nick,
>
> This is substantial work and it looks good to me. Do you know why
> there's been little progress on landing these patches? Buggy Apple ARM
> PMU support in the kernel has led to reworking the perf tool. It seems
> best that we can have the best drivers possible.

I have no idea why the patches are taking so long. As for the buggy part I think only notable bug
has been M2's performance counter length increase from 48 to 64 (which for linux's purposes
is from 47 to 63) being overlooked[1], and I don't think there have been regressions.

It is not so much bugs, but rather lack of features. For the longest time we knew almost nothing
about the PMU events, and it is not until someone managed to extract the event names from
macOS and Apple's Apple Silicon CPU Optimization Guide[2] that we know quite a bit more
about the PMU. The event names are then added when it was determined that it is okay from
a copyright perspective[3] (it's the same as being allowed to use registers names from proprietary
ARM ARM). As for the  description the guide does have descriptions, but descriptions are more
doubtful than names from a copyright perspective so I do not know if they could be ever be added
to the userspace perf tool.

[1]: https://lore.kernel.org/all/20230528080205.288446-1-maz@kernel.org/
[2]: https://github.com/cyyself/m1-pmu-gen
[3]: https://lore.kernel.org/all/tencent_C5DA658E64B8D13125210C8D707CD8823F08@qq.com/


Best regards,
Nick Chan

>
> Thanks,
> Ian
>
>> ---
>> Changes in v7:
>> - Fix a W=1 compile warning in apple_pmu_get_event_idx() as appearently using GENMASK()
>> in a function prototype causes a warning in GCC.
>> - Link to v6: https://lore.kernel.org/r/20250407-apple-cpmu-v6-0-ae8c2f225c1f@gmail.com
>>
>> Changes in v6:
>> - Rebased on top of v6.15-rc1 (Conflict with FEAT_PMUv3 support for KVM on Apple Hardware)
>> - Add patch to skip initialization of PMUv3 remap in EL1 even though not strictly needed
>> - Include DT patches
>> - Link to v5: https://lore.kernel.org/r/20250228-apple-cpmu-v5-0-9e124cd28ed4@gmail.com
>>
>> Changes in v5:
>> - Slightly change "drivers/perf: apple_m1: Add Apple A11 Support", to keep things in
>> chronological order.
>> - Link to v4: https://lore.kernel.org/r/20250214-apple-cpmu-v4-0-ffca0e45147e@gmail.com
>>
>> Changes in v4:
>> - Support per-implementation event attr group
>> - Fix Apple A7 event attr groups
>> - Link to v3: https://lore.kernel.org/r/20250213-apple-cpmu-v3-0-be7f8aded81f@gmail.com
>>
>> Changes in v3:
>> - Configure PMC8 and PMC9 for 32-bit EL0
>> - Remove redundant _common suffix from shared functions
>> - Link to v2: https://lore.kernel.org/r/20250213-apple-cpmu-v2-0-87b361932e88@gmail.com
>>
>> Changes in v2:
>> - Remove unused flags parameter from apple_pmu_init_common()
>> - Link to v1: https://lore.kernel.org/r/20250212-apple-cpmu-v1-0-f8c7f2ac1743@gmail.com
>>
>> ---
>> Nick Chan (21):
>>       dt-bindings: arm: pmu: Add Apple A7-A11 SoC CPU PMU compatibles
>>       drivers/perf: apple_m1: Only init PMUv3 remap when EL2 is available
>>       drivers/perf: apple_m1: Support per-implementation event tables
>>       drivers/perf: apple_m1: Support a per-implementation number of counters
>>       drivers/perf: apple_m1: Support configuring counters for 32-bit EL0
>>       drivers/perf: apple_m1: Support per-implementation PMU startup
>>       drivers/perf: apple_m1: Support per-implementation event attr group
>>       drivers/perf: apple_m1: Add Apple A7 support
>>       drivers/perf: apple_m1: Add Apple A8/A8X support
>>       drivers/perf: apple_m1: Add A9/A9X support
>>       drivers/perf: apple_m1: Add Apple A10/A10X/T2 Support
>>       drivers/perf: apple_m1: Add Apple A11 Support
>>       arm64: dts: apple: s5l8960x: Add CPU PMU nodes
>>       arm64: dts: apple: t7000: Add CPU PMU nodes
>>       arm64: dts: apple: t7001: Add CPU PMU nodes
>>       arm64: dts: apple: s800-0-3: Add CPU PMU nodes
>>       arm64: dts: apple: s8001: Add CPU PMU nodes
>>       arm64: dts: apple: t8010: Add CPU PMU nodes
>>       arm64: dts: apple: t8011: Add CPU PMU nodes
>>       arm64: dts: apple: t8012: Add CPU PMU nodes
>>       arm64: dts: apple: t8015: Add CPU PMU nodes
>>
>>  Documentation/devicetree/bindings/arm/pmu.yaml |   6 +
>>  arch/arm64/boot/dts/apple/s5l8960x.dtsi        |   8 +
>>  arch/arm64/boot/dts/apple/s800-0-3.dtsi        |   8 +
>>  arch/arm64/boot/dts/apple/s8001.dtsi           |   8 +
>>  arch/arm64/boot/dts/apple/t7000.dtsi           |   8 +
>>  arch/arm64/boot/dts/apple/t7001.dtsi           |   9 +
>>  arch/arm64/boot/dts/apple/t8010.dtsi           |   8 +
>>  arch/arm64/boot/dts/apple/t8011.dtsi           |   9 +
>>  arch/arm64/boot/dts/apple/t8012.dtsi           |   8 +
>>  arch/arm64/boot/dts/apple/t8015.dtsi           |  24 +
>>  arch/arm64/include/asm/apple_m1_pmu.h          |   3 +
>>  drivers/perf/apple_m1_cpu_pmu.c                | 807 +++++++++++++++++++++++--
>>  12 files changed, 871 insertions(+), 35 deletions(-)
>> ---
>> base-commit: 0af2f6be1b4281385b618cb86ad946eded089ac8
>> change-id: 20250211-apple-cpmu-5a5a3da39483
>>
>> Best regards,
>> --
>> Nick Chan <towinchenmi@gmail.com>
>>
>>