From: Yicong Yang <yangyicong@huawei.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: <yangyicong@hisilicon.com>, <namhyung@kernel.org>,
<catalin.marinas@arm.com>, <will@kernel.org>,
<peterz@infradead.org>, <mingo@redhat.com>,
<mark.rutland@arm.com>, <jolsa@kernel.org>,
<john.g.garry@oracle.com>, <james.clark@linaro.org>,
<leo.yan@linux.dev>, <irogers@google.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-perf-users@vger.kernel.org>, <jonathan.cameron@huawei.com>,
<hejunhao3@huawei.com>, <linuxarm@huawei.com>,
<wangyushan12@huawei.com>, <caijingtao@huawei.com>,
<xueshan2@huawei.com>, <prime.zeng@hisilicon.com>,
Joe Mario <jmario@redhat.com>
Subject: Re: [PATCH v2 0/3] Add support for SPE Data Source packet on HiSilicon HIP12
Date: Mon, 26 May 2025 19:06:37 +0800 [thread overview]
Message-ID: <f5afc098-def8-fa83-db9e-32837eadec0c@huawei.com> (raw)
In-Reply-To: <aC3oFxuEbVEHd3Pb@x1>
Hi Arnaldo,
On 2025/5/21 22:49, Arnaldo Carvalho de Melo wrote:
> On Wed, May 14, 2025 at 11:38:42AM +0800, Yicong Yang wrote:
>> a gentle ping on this..
>
> So this involves both kernel and tooling, as soon as someone merges the
> kernel part, I can try and get to the user part,
is it still possible to catch up with this cycle? Kernel part has been picked up [1].
thanks.
[1] https://lore.kernel.org/linux-arm-kernel/174790933967.1291842.14160046478134585349.b4-ty@kernel.org/
>
> - Arnaldo
>
>> Thanks.
>>
>> On 2025/4/25 11:38, Yicong Yang wrote:
>>> From: Yicong Yang <yangyicong@hisilicon.com>
>>>
>>> Add support for Data Source packet on HIP12. Support counting L2 HITM for c2c
>>> statistic since it was missing.
>>>
>>> Change since v2:
>>> - split the kernel/userspace changes into different patch
>>> - revise some mem_snoop decoding according to the discussion
>>> - count missing L2 HITM for c2c statistic
>>> Link: https://lore.kernel.org/linux-perf-users/20250408122809.37884-1-yangyicong@huawei.com/
>>>
>>> Yicong Yang (3):
>>> arm64: cputype: Add cputype definition for HIP12
>>> perf arm-spe: Add support for SPE Data Source packet on HiSilicon
>>> HIP12
>>> perf mem: Count L2 HITM for c2c statistic
>>>
>>> arch/arm64/include/asm/cputype.h | 2 +
>>> tools/arch/arm64/include/asm/cputype.h | 2 +
>>> .../util/arm-spe-decoder/arm-spe-decoder.h | 17 ++++
>>> tools/perf/util/arm-spe.c | 96 +++++++++++++++++++
>>> tools/perf/util/mem-events.c | 5 +-
>>> 5 files changed, 121 insertions(+), 1 deletion(-)
>>>
>
> .
>
next prev parent reply other threads:[~2025-05-26 11:06 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-25 3:38 [PATCH v2 0/3] Add support for SPE Data Source packet on HiSilicon HIP12 Yicong Yang
2025-04-25 3:38 ` [PATCH v2 1/3] arm64: cputype: Add cputype definition for HIP12 Yicong Yang
2025-05-22 9:13 ` Yicong Yang
2025-05-22 10:25 ` Will Deacon
2025-04-25 3:38 ` [PATCH v2 2/3] perf arm-spe: Add support for SPE Data Source packet on HiSilicon HIP12 Yicong Yang
2025-05-21 10:35 ` Leo Yan
2025-04-25 3:38 ` [PATCH v2 3/3] perf mem: Count L2 HITM for c2c statistic Yicong Yang
2025-05-21 10:37 ` Leo Yan
2025-05-14 3:38 ` [PATCH v2 0/3] Add support for SPE Data Source packet on HiSilicon HIP12 Yicong Yang
2025-05-21 14:49 ` Arnaldo Carvalho de Melo
2025-05-22 9:07 ` Yicong Yang
2025-05-26 11:06 ` Yicong Yang [this message]
2025-05-27 20:54 ` Arnaldo Carvalho de Melo
2025-05-22 10:50 ` Will Deacon
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