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From: John Garry <john.g.garry@oracle.com>
To: Jing Zhang <renyu.zj@linux.alibaba.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	John Garry <john.garry@huawei.com>, Will Deacon <will@kernel.org>,
	James Clark <james.clark@arm.com>,
	Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Andrew Kilroy <andrew.kilroy@arm.com>,
	Shuai Xue <xueshuai@linux.alibaba.com>,
	Zhuo Song <zhuo.song@linux.alibaba.com>
Subject: Re: [External] : [RFC PATCH v2 1/6] perf vendor events arm64: Add topdown L1 metrics for neoverse-n2
Date: Tue, 15 Nov 2022 11:19:18 +0000	[thread overview]
Message-ID: <f6e26e2d-2f10-e973-6c9f-47594da2fc99@oracle.com> (raw)
In-Reply-To: <f3823c3e-d45e-40ce-1981-e726b4b6be62@linux.alibaba.com>

On 15/11/2022 08:43, Jing Zhang wrote:
> I didn't find out how to put the metric as an arch std event, it would be best if you could provide me with an example in the upstream code,
> thank you very much.

As things stand, I don't think it's supported. We only support regular 
events for std arch events (and not metrics).

However we could expand support for metrics.

For the example of hip08 and FRONTEND_BOUND, we would have:

--->8---

diff --git 
a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json 
b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
index 6443a061e22a..5b1ca45224de 100644
--- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
@@ -1,10 +1,6 @@
  [
      {
-        "MetricExpr": "FETCH_BUBBLE / (4 * CPU_CYCLES)",
-        "PublicDescription": "Frontend bound L1 topdown metric",
-        "BriefDescription": "Frontend bound L1 topdown metric",
-        "MetricGroup": "TopDownL1",
-        "MetricName": "frontend_bound"
+        "ArchStdEvent": "FRONTEND_BOUND"
      },
      {
          "MetricExpr": "(INST_SPEC - INST_RETIRED) / (4 * CPU_CYCLES)",
diff --git a/tools/perf/pmu-events/arch/arm64/sbsa.json 
b/tools/perf/pmu-events/arch/arm64/sbsa.json
new file mode 100644
index 000000000000..10b9c0cccc40
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/sbsa.json
@@ -0,0 +1,9 @@
+[
+    {
+        "MetricExpr": "FETCH_BUBBLE / (4 * CPU_CYCLES)",
+        "PublicDescription": "Frontend bound L1 topdown metric",
+        "BriefDescription": "Frontend bound L1 topdown metric",
+        "MetricGroup": "TopDownL1",
+        "MetricName": "FRONTEND_BOUND"
+    }
+]
diff --git a/tools/perf/pmu-events/jevents.py 
b/tools/perf/pmu-events/jevents.py
index 0daa3e007528..77049853c0bf 100755
--- a/tools/perf/pmu-events/jevents.py
+++ b/tools/perf/pmu-events/jevents.py
@@ -352,6 +352,8 @@ def preprocess_arch_std_files(archpath: str) -> None:
        for event in read_json_events(item.path, topic=''):
          if event.name:
            _arch_std_events[event.name.lower()] = event
+        if event.metric_name:
+          _arch_std_events[event.metric_name.lower()] = event


  def print_events_table_prefix(tblname: str) -> None:
-- 
2.35.3

Note that this is for illustration only. The frontend bound metric for 
hip08 does not really belong in sbsa.json as it does not adhere to that 
spec. But for platforms which do adhere to the spec, we could pick up 
the metrics values from sbsa.json (or whatever we want to call it).

> 
>>> However, due to the wrong count of stall_slot and stall_slot_frontend
>>> in neoverse-n2, the real stall_slot and real stall_slot_frontend need
>>> to subtract cpu_cycles, so when calculating the topdownL1 metrics,
>>> stall_slot and stall_slot_frontend are corrected.
>> Is there a reference to this? It would be indeed useful to pass a link to the n2 doc as these metrics are not part of the arm64 arm. At least I assume that they are not there.
>>
> You are right, I need to add a doc link. ARM has released the n2 ERRATA document about the incorrect count of stall_slot and stall_slot_frontend,
> and provides a workaround to get the correct value.
> Link:https://urldefense.com/v3/__https://developer.arm.com/documentation/SDEN1982442/1200/?lang=en__;!!ACWV5N9M2RV99hQ!I3rCI-RcuDmpfAiWhA_SAxRrq1hCyhA9am8YmrwizljPz9X_G4H_odm_4aRgRo8VswDeC3TATbylxf_vhAJhWbJrlw$  
> 

Note that std arch events support is such that we can still overwrite 
individual std values in the platform-specific json (or at least we used 
to be able to - I have not checked recently). So for n2 case of 
stall_slot, we could use std arch events in the n2 json but overwrite 
the metric expression, like:

+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/metrics.json
@@ -1,10 +1,6 @@
  [
      {
          "ArchStdEvent": "FRONTEND_BOUND"
	 "MetricExpr": <insert n2 specific expression>",
      },

Thanks,
John

  reply	other threads:[~2022-11-15 11:20 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-31 11:11 [PATCH RFC 0/6] Add metrics for neoverse-n2 Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 1/6] perf vendor events arm64: Add topdown L1 " Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 2/6] perf vendor events arm64: Add TLB " Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 3/6] perf vendor events arm64: Add cache " Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 4/6] perf vendor events arm64: Add branch " Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 5/6] perf vendor events arm64: Add PE utilization " Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 6/6] perf vendor events arm64: Add instruction mix " Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 0/6] Add " Jing Zhang
2022-11-24 17:14   ` [PATCH v3 " Jing Zhang
2022-11-24 17:14   ` [PATCH v3 1/6] perf vendor events arm64: Add topdown L1 " Jing Zhang
2022-11-24 17:14   ` [PATCH v3 2/6] perf vendor events arm64: Add TLB " Jing Zhang
2022-11-24 17:14   ` [PATCH v3 3/6] perf vendor events arm64: Add cache " Jing Zhang
2022-11-24 17:14   ` [PATCH v3 4/6] perf vendor events arm64: Add branch " Jing Zhang
2022-11-24 17:14   ` [PATCH v3 5/6] perf vendor events arm64: Add PE utilization " Jing Zhang
2022-11-30 18:58     ` Ian Rogers
2022-12-01 11:08       ` Jing Zhang
2022-12-02 20:05         ` Ian Rogers
2022-12-04  7:10           ` Jing Zhang
2022-11-24 17:14   ` [PATCH v3 6/6] perf vendor events arm64: Add instruction mix " Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 1/6] perf vendor events arm64: Add topdown L1 " Jing Zhang
2022-11-14 12:59   ` [External] : " John Garry
2022-11-15  8:43     ` Jing Zhang
2022-11-15 11:19       ` John Garry [this message]
2022-11-21  9:53         ` Jing Zhang
2022-11-21 10:22           ` John Garry
2022-11-21 15:17             ` Jing Zhang
2022-11-21 17:55               ` John Garry
2022-11-22  9:24                 ` Jing Zhang
2022-11-22 14:00                 ` James Clark
2022-11-22 15:41                   ` Jing Zhang
2022-11-23 14:26                     ` James Clark
2022-11-24 16:32                       ` Jing Zhang
2022-11-24 16:51                         ` James Clark
2022-11-14  7:41 ` [RFC PATCH v2 2/6] perf vendor events arm64: Add TLB " Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 3/6] perf vendor events arm64: Add cache " Jing Zhang
2022-11-14  8:35   ` Xing Zhengjun
2022-11-15  6:28     ` Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 4/6] perf vendor events arm64: Add branch " Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 5/6] perf vendor events arm64: Add PE utilization " Jing Zhang
2022-11-14  7:42 ` [RFC PATCH v2 6/6] perf vendor events arm64: Add instruction mix " Jing Zhang
2022-11-16 11:19 ` [PATCH RFC 0/6] Add " James Clark
2022-11-16 15:26   ` Jing Zhang
2022-11-21 11:51     ` James Clark
2022-11-22  7:11       ` Jing Zhang
2022-11-22 11:53         ` James Clark
2022-11-19  3:30   ` Jing Zhang
     [not found]     ` <CAP-5=fW+Z_Tc3BfK1bRKUeKWfxtPfoZXL9D2BhcU1SzNOruSsg@mail.gmail.com>
2022-11-20  3:49       ` Jing Zhang
2022-11-21 11:55       ` James Clark

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