From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Daniel Golle <daniel@makrotopia.org>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Qingfang Deng <dqfext@gmail.com>,
SkyLake Huang <SkyLake.Huang@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Cc: Bc-bocun Chen <bc-bocun.chen@mediatek.com>,
Steven Liu <steven.liu@mediatek.com>,
John Crispin <john@phrozen.org>
Subject: Re: [PATCH v2 2/2] phy: add driver for MediaTek XFI T-PHY
Date: Tue, 6 Feb 2024 10:28:07 +0100 [thread overview]
Message-ID: <02f4d6ee-e9f6-4184-a125-091f45bae54a@collabora.com> (raw)
In-Reply-To: <2972dfd0b9ca48174fbf49b9d162bac1a12b2331.1707153425.git.daniel@makrotopia.org>
Il 05/02/24 18:29, Daniel Golle ha scritto:
> Add driver for MediaTek's XFI T-PHY which can be found in the MT7988
> SoC. The XFI T-PHY is a 10 Gigabit/s Ethernet SerDes PHY with muxes on
> the internal side to be used with either USXGMII PCS or LynxI PCS,
> depending on the selected PHY interface mode.
>
> The PHY can operates only in PHY_MODE_ETHERNET, the submode is one of
> PHY_INTERFACE_MODE_* corresponding to the supported modes:
>
> * USXGMII \
> * 10GBase-R }- USXGMII PCS - XGDM \
> * 5GBase-R / \
> }- Ethernet MAC
> * 2500Base-X \ /
> * 1000Base-X }- LynxI PCS - GDM /
> * Cisco SGMII (MAC side) /
>
> In order to work-around a performance issue present on the first of
> two XFI T-PHYs present in MT7988, special tuning is applied which can be
> selected by adding the 'mediatek,usxgmii-performance-errata' property to
> the device tree node.
>
> There is no documentation for most registers used for the
> analog/tuning part, however, most of the registers have been partially
> reverse-engineered from MediaTek's SDK implementation (an opaque
> sequence of 32-bit register writes) and descriptions for all relevant
> digital registers and bits such as resets and muxes have been supplied
> by MediaTek.
>
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
--
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next prev parent reply other threads:[~2024-02-06 10:31 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-05 17:28 [PATCH v2 1/2] dt-bindings: phy: mediatek,mt7988-xfi-tphy: add new bindings Daniel Golle
2024-02-05 17:29 ` [PATCH v2 2/2] phy: add driver for MediaTek XFI T-PHY Daniel Golle
2024-02-06 9:28 ` AngeloGioacchino Del Regno [this message]
2024-02-06 9:28 ` [PATCH v2 1/2] dt-bindings: phy: mediatek,mt7988-xfi-tphy: add new bindings AngeloGioacchino Del Regno
2024-02-06 10:53 ` Krzysztof Kozlowski
2024-02-06 15:31 ` Daniel Golle
2024-02-07 7:14 ` Bc-bocun Chen (陳柏村)
2024-02-07 15:07 ` Krzysztof Kozlowski
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