From: "Rob Herring (Arm)" <robh@kernel.org>
To: Gerald Loacker <gerald.loacker@wolfvision.net>
Cc: Conor Dooley <conor+dt@kernel.org>,
linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, Vinod Koul <vkoul@kernel.org>,
devicetree@vger.kernel.org, Heiko Stuebner <heiko@sntech.de>,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v3 2/3] dt-bindings: phy: rockchip-inno-csi-dphy: add rockchip,clk-lane-phase property
Date: Tue, 30 Jun 2026 14:25:45 -0500 [thread overview]
Message-ID: <178284754478.82737.4770095981342524898.robh@kernel.org> (raw)
In-Reply-To: <20260630-feature-mipi-csi-dphy-4k60-v3-2-176792ab71fa@wolfvision.net>
On Tue, 30 Jun 2026 09:48:25 +0200, Gerald Loacker wrote:
> Add support for the optional rockchip,clk-lane-phase device tree property
> to allow board-specific tuning of the clock lane sampling phase for
> improved signal integrity across supported data rates.
>
> Signed-off-by: Gerald Loacker <gerald.loacker@wolfvision.net>
> ---
> .../devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
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next prev parent reply other threads:[~2026-06-30 19:25 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 7:48 [PATCH v3 0/3] phy: rockchip: inno-csidphy: fix 2500 Mbps support and add clock lane phase tuning Gerald Loacker
2026-06-30 7:48 ` [PATCH v3 1/3] phy: rockchip: phy-rockchip-inno-csidphy: fix rk1808 hsfreq table Gerald Loacker
2026-06-30 8:00 ` sashiko-bot
2026-06-30 7:48 ` [PATCH v3 2/3] dt-bindings: phy: rockchip-inno-csi-dphy: add rockchip,clk-lane-phase property Gerald Loacker
2026-06-30 19:25 ` Rob Herring (Arm) [this message]
2026-06-30 7:48 ` [PATCH v3 3/3] phy: rockchip: phy-rockchip-inno-csidphy: add clock lane phase tuning Gerald Loacker
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