From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 55814C5AD2B for ; Fri, 7 Aug 2026 23:01:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VtzqwvNa+eEh19cwGwi3BcnB0uEJ9J8tzl+ZpqIqB1w=; b=vBwtGisSQ6hfwX NeEStfc7wRy9/S43EXx/ncdW5t1iBEOcF8JB4TuW009nm883ow6RnuBI63ZiIwTYO72iiuQUk8x0o 8eUtqS8dWpQo+eyAn8HJDSMNMmi/CzNXY12euGQWMNOcjIYjSC7L/FSpCnD5nWuttSxwxJoc4cEuz YyEO7Sgy7eQBJtHaOlCLdthCZ7aypUi9keTS4t3G0qgpRepW1p5vKhwZlXq6jpREPELO1xQlp3JPI xLQdW4BjypZMlc0dQa+Go3XVgwrCJnnBZCylIR1K2v+h7D8ojKCQVmpVw2FpKaPMTJLvBih6Htri8 uzG4wo9Z8SQQznGo02aw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wsTYl-00000008qdO-08IG; Fri, 07 Aug 2026 23:01:03 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wsTYj-00000008qct-0vub; Fri, 07 Aug 2026 23:01:01 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id C4714412DF; Fri, 7 Aug 2026 23:01:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6AFA31F000E9; Fri, 7 Aug 2026 23:01:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786143660; bh=80WwaWF3koU49E/sRFCnvP1FuEZ0SDdFnVmZ11ugSq8=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=TKvsulIiESdBbBvXgonJJwAOAKG8TSVt2FgsLIZaPCONt51BEhO4suy5xyN4sNNwD X243TXYp14/zmjAfI38a/A5ckjfvIFLlKY95IUN3e6ED/DjGcZlrNctEFqQhy8FiAn /a+rH1pK0F9aIGaDOxj/XXMWkUeNSZkFOoTnlJZqes1q9ukqlI2PPHq4J8XHD3FE5P j0v/G5+5xXhzDSDbHJUWwiBcmXUxAZMI2Vj/kdQl5+Nt4KU/pOp7W78LSJgGUJaFWO 9flqrtndIoebvI8BUbZZmZxACXKgsq3guEr2np2LBSUoB5Y3TiAnbKECkqUMqXzBxt zW/Pbxfiwt5TA== Date: Fri, 7 Aug 2026 18:00:59 -0500 From: "Rob Herring (Arm)" To: Cody Kang Cc: Conor Dooley , Palmer Dabbelt , Vinod Koul , Albert Ou , Haylen Chu , Krzysztof Kozlowski , Thomas Zimmermann , dri-devel@lists.freedesktop.org, Neil Armstrong , David Airlie , Stephen Boyd , Yixun Lan , Paul Walmsley , spacemit@lists.linux.dev, Maarten Lankhorst , linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Michael Turquette , Philipp Zabel , linux-clk@vger.kernel.org, Maxime Ripard , devicetree@vger.kernel.org, Simona Vetter , Brian Masney , Alexandre Ghiti , linux-riscv@lists.infradead.org Subject: Re: [PATCH RESEND 02/17] dt-bindings: phy: add SpacemiT K3 Innosilicon DP PHY Message-ID: <178614365931.2211151.16636336802948226214.robh@kernel.org> References: <20260725-k3-display-v1-0-6de34d80e86c@gmail.com> <20260725-k3-display-v1-2-6de34d80e86c@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20260725-k3-display-v1-2-6de34d80e86c@gmail.com> X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Sat, 25 Jul 2026 00:51:11 -0400, Cody Kang wrote: > The SpacemiT K3 DisplayPort controller drives its four transmit lanes > through an integrated Innosilicon DP PHY, one PHY per controller. Add a > binding so the controller can reference its transmit PHY and the pixel > clock the PHY's PLL sources. > > The PHY's registers are interleaved with its parent controller's inside > one MMIO window, so it owns neither a reg nor a reset and is modelled as > a child of the controller. > > It exposes its PLL-generated pixel clock through #clock-cells, so the > APMU pixel-clock mux can select it as a parent through the clock > framework. > > Signed-off-by: Cody Kang > --- > .../bindings/phy/spacemit,k3-inno-dp-phy.yaml | 48 ++++++++++++++++++++++ > 1 file changed, 48 insertions(+) > Reviewed-by: Rob Herring (Arm) -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy