From: Vinod Koul <vkoul@kernel.org>
To: Neil Armstrong <neil.armstrong@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Algea Cao <algea.cao@rock-chips.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: kernel@collabora.com, linux-phy@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
"Thomas Niederprüm" <dubito@online.de>,
"Simon Wright" <simon@symple.nz>,
"Diederik de Haas" <diederik@cknow-tech.com>,
"Andy Yan" <andyshrk@gmail.com>,
"Dmitry Baryshkov" <dmitry.baryshkov@oss.qualcomm.com>,
Sashiko <sashiko-bot@kernel.org>,
"Andy Yan" <andy.yan@rock-chips.com>
Subject: Re: [PATCH v5 00/10] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups
Date: Tue, 11 Aug 2026 22:33:32 +0530 [thread overview]
Message-ID: <178646781244.1081354.2111582665697305280.b4-ty@kernel.org> (raw)
In-Reply-To: <20260723-hdptx-clk-fixes-v5-0-8e786067865f@collabora.com>
On Thu, 23 Jul 2026 22:41:43 +0300, Cristian Ciocaltea wrote:
> This series provides a set of bug fixes and cleanups for the Rockchip
> Samsung HDPTX PHY driver.
>
> The first part of the series addresses clock rate calculation and
> synchronization issues. Specifically, it fixes edge cases where the PHY
> PLL is pre-programmed by an external component (like a bootloader) or
> when changing the color depth (bpc) while keeping the modeline constant.
> Because the Common Clock Framework .set_rate() callback might not be
> invoked if the pixel clock remains unchanged, this previously led to
> out-of-sync states between CCF and the actual HDMI PHY configuration.
>
> [...]
Applied, thanks!
[01/10] phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc
commit: f0c2c9c58a48b621b1cb90f0821da422b31af814
[02/10] phy: rockchip: samsung-hdptx: Prevent divide-by-zero when computing clk rate
commit: c4fe5a9f379055ce0ec930f6495ae62aad237b89
[03/10] phy: rockchip: samsung-hdptx: Guard against clk rate integer underflow
commit: 229788526ff24e0607726e93b74dd2ef157a99cd
[04/10] phy: rockchip: samsung-hdptx: Fix rate recalculation for 3.2GHz FRL
commit: 9ac3daadb9060360e937a5993a5fd88360d6fdad
[05/10] phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes
commit: aec3e4ce25da4ed37bbbfedcbb7107ae9428b183
[06/10] phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround
commit: c2dd42e3ebd76f24bdc21eafe17149bec2ce1394
[07/10] phy: rockchip: samsung-hdptx: Consolidate consumer_put on error path
commit: e49e4bc9f90eeb6b672762c6f089e2fafec104c4
[08/10] phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling
commit: 1bb1b4769e43ecc8ed30bd30b6d4514614753f2c
[09/10] phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16()
commit: 859fd8ae691e8c89c881da5edf0a827531daa372
[10/10] phy: rockchip: samsung-hdptx: Consistently use bitfield macros
commit: f3a8aba9c36f26b5bb1024653d9083f7e1e6d8c8
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
prev parent reply other threads:[~2026-08-11 17:03 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-23 19:41 [PATCH v5 00/10] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups Cristian Ciocaltea
2026-07-23 19:41 ` [PATCH v5 01/10] phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc Cristian Ciocaltea
2026-08-07 12:58 ` Manivannan Sadhasivam
2026-07-23 19:41 ` [PATCH v5 02/10] phy: rockchip: samsung-hdptx: Prevent divide-by-zero when computing clk rate Cristian Ciocaltea
2026-07-23 19:55 ` sashiko-bot
2026-07-23 21:40 ` Cristian Ciocaltea
2026-08-07 12:56 ` Manivannan Sadhasivam
2026-08-07 14:19 ` Cristian Ciocaltea
2026-08-11 11:24 ` Vinod Koul
2026-08-11 15:51 ` Cristian Ciocaltea
2026-07-23 19:41 ` [PATCH v5 03/10] phy: rockchip: samsung-hdptx: Guard against clk rate integer underflow Cristian Ciocaltea
2026-07-23 19:57 ` sashiko-bot
2026-07-23 21:22 ` Cristian Ciocaltea
2026-08-07 12:56 ` Manivannan Sadhasivam
2026-07-23 19:41 ` [PATCH v5 04/10] phy: rockchip: samsung-hdptx: Fix rate recalculation for 3.2GHz FRL Cristian Ciocaltea
2026-08-07 12:57 ` Manivannan Sadhasivam
2026-07-23 19:41 ` [PATCH v5 05/10] phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes Cristian Ciocaltea
2026-07-23 20:00 ` sashiko-bot
2026-07-23 21:48 ` Cristian Ciocaltea
2026-08-07 13:04 ` Manivannan Sadhasivam
2026-08-07 14:22 ` Cristian Ciocaltea
2026-07-23 19:41 ` [PATCH v5 06/10] phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround Cristian Ciocaltea
2026-07-23 19:54 ` sashiko-bot
2026-07-23 20:50 ` Cristian Ciocaltea
2026-08-07 13:06 ` Manivannan Sadhasivam
2026-07-23 19:41 ` [PATCH v5 07/10] phy: rockchip: samsung-hdptx: Consolidate consumer_put on error path Cristian Ciocaltea
2026-08-07 13:07 ` Manivannan Sadhasivam
2026-07-23 19:41 ` [PATCH v5 08/10] phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling Cristian Ciocaltea
2026-08-07 13:08 ` Manivannan Sadhasivam
2026-07-23 19:41 ` [PATCH v5 09/10] phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16() Cristian Ciocaltea
2026-08-07 13:11 ` Manivannan Sadhasivam
2026-07-23 19:41 ` [PATCH v5 10/10] phy: rockchip: samsung-hdptx: Consistently use bitfield macros Cristian Ciocaltea
2026-08-07 13:12 ` Manivannan Sadhasivam
2026-08-11 17:03 ` Vinod Koul [this message]
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