From: "Heiko Stübner" <heiko@sntech.de>
To: vkoul@kernel.org, kishon@kernel.org,
Diederik de Haas <didi.debian@cknow.org>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
quentin.schulz@cherry.de, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
Heiko Stuebner <heiko.stuebner@cherry.de>
Subject: Re: [PATCH v2 1/2] dt-bindings: phy: Add Rockchip MIPI CSI/DSI PHY schema
Date: Wed, 13 Nov 2024 19:50:33 +0100 [thread overview]
Message-ID: <18621846.sWSEgdgrri@diego> (raw)
In-Reply-To: <D5F5RRFVMP7R.19G82R4S878IL@cknow.org>
Hi,
Am Mittwoch, 6. November 2024, 15:17:02 CET schrieb Diederik de Haas:
> On Mon Nov 4, 2024 at 12:11 PM CET, Heiko Stuebner wrote:
> > From: Heiko Stuebner <heiko.stuebner@cherry.de>
> >
> > Add dt-binding schema for the MIPI CSI/DSI PHY found on
> > Rockchip RK3588 SoCs.
> >
> > Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
> > ---
> > .../phy/rockchip,rk3588-mipi-dcphy.yaml | 82 +++++++++++++++++++
> > 1 file changed, 82 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml
> > new file mode 100644
> > index 000000000000..5ee8d7246fa0
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml
> > @@ -0,0 +1,82 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/rockchip,rk3588-mipi-dcphy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Rockchip MIPI CSI/DSI PHY with Samsung IP block
> > +
> > +maintainers:
> > + - Guochun Huang <hero.huang@rock-chips.com>
> > + - Heiko Stuebner <heiko@sntech.de>
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - rockchip,rk3576-mipi-dcphy
> > + - rockchip,rk3588-mipi-dcphy
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > + clocks:
> > + maxItems: 2
> > +
> > + clock-names:
> > + items:
> > + - const: pclk
> > + - const: ref
> > +
> > + resets:
> > + maxItems: 4
> > +
> > + reset-names:
> > + items:
> > + - const: m_phy
> > + - const: apb
> > + - const: grf
> > + - const: s_phy
> > +
> > + rockchip,grf:
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > + description:
> > + Phandle to the syscon managing the 'mipi dcphy general register files'.
>
> Should this dt-binding have a power-domains property?
> RK3588 TRM v1.0 part 1 page 1097 has ALIVE(PD_BUS) for
> MIPI_DC_PHY0~MIPI_DC_PHY1
I don't think so. As you write, the dcphy is part of the PD_BUS(ALIVE)
power-domain on at least rk3588 and the new rk3576.
This power-domain is actually non-controllable and also contains things
like the main GIC - so will be always on.
And for that reason probably, that domain also is not even exposed
in the rk3588 devicetree (nor the driver implementation).
Similarly the hdptx phy binding (in a similar situation) also does not
handle a power-domain. So my thinking is, we'll stay like this for now.
Heiko
> FTR: I made a similar remark on another patch sent by Heiko today. While
> that was incorrect, I do think it's appropriate for this binding after
> which it could also be added to the respective phy nodes in the dts(i)
> file(s).
>
> Cheers,
> Diederik
>
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - clock-names
> > + - resets
> > + - reset-names
> > + - "#phy-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/rockchip,rk3588-cru.h>
> > + #include <dt-bindings/reset/rockchip,rk3588-cru.h>
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + phy@feda0000 {
> > + compatible = "rockchip,rk3588-mipi-dcphy";
> > + reg = <0x0 0xfeda0000 0x0 0x10000>;
> > + clocks = <&cru PCLK_MIPI_DCPHY0>,
> > + <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>;
> > + clock-names = "pclk", "ref";
> > + resets = <&cru SRST_M_MIPI_DCPHY0>,
> > + <&cru SRST_P_MIPI_DCPHY0>,
> > + <&cru SRST_P_MIPI_DCPHY0_GRF>,
> > + <&cru SRST_S_MIPI_DCPHY0>;
> > + reset-names = "m_phy", "apb", "grf", "s_phy";
> > + rockchip,grf = <&mipidcphy0_grf>;
> > + #phy-cells = <0>;
> > + };
> > + };
>
>
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next prev parent reply other threads:[~2024-11-13 18:51 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-04 11:11 [PATCH v2 0/2] MIPI DSI phy for rk3588 Heiko Stuebner
2024-11-04 11:11 ` [PATCH v2 1/2] dt-bindings: phy: Add Rockchip MIPI CSI/DSI PHY schema Heiko Stuebner
2024-11-05 8:59 ` Krzysztof Kozlowski
2024-11-06 14:17 ` Diederik de Haas
2024-11-13 18:50 ` Heiko Stübner [this message]
2024-11-04 11:11 ` [PATCH v2 2/2] phy: rockchip: Add Samsung CSI/DSI Combo DCPHY driver Heiko Stuebner
2024-11-05 14:53 ` Sebastian Reichel
2024-11-13 12:39 ` Heiko Stübner
2024-11-05 19:14 ` kernel test robot
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