From: Qiang Yu <quic_qianyu@quicinc.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: <vkoul@kernel.org>, <kishon@kernel.org>, <robh@kernel.org>,
<andersson@kernel.org>, <konradybcio@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<abel.vesa@linaro.org>, <quic_msarkar@quicinc.com>,
<quic_devipriy@quicinc.com>, <dmitry.baryshkov@linaro.org>,
<kw@linux.com>, <lpieralisi@kernel.org>,
<neil.armstrong@linaro.org>, <linux-arm-msm@vger.kernel.org>,
<linux-phy@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>
Subject: Re: [PATCH v2 1/5] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8
Date: Thu, 19 Sep 2024 21:47:29 +0800 [thread overview]
Message-ID: <1dff17e3-580b-4829-b889-0c559db64f26@quicinc.com> (raw)
In-Reply-To: <20240913133751.2yegqbobvfzbogxc@thinkpad>
On 9/13/2024 9:37 PM, Manivannan Sadhasivam wrote:
> On Fri, Sep 13, 2024 at 01:37:20AM -0700, Qiang Yu wrote:
>> PCIe 3rd instance of X1E80100 support Gen 4x8 which needs different 8 lane
>> capable QMP PCIe PHY. Document Gen 4x8 PHY as separate module.
>>
> Nit: please use 'Gen 4 x8'
Will update in next version patch.
Thanks,
Qiang
>
> - Mani
>
>> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
>> ---
>> .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
>> index dcf4fa55fbba..680ec3113c2b 100644
>> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
>> @@ -41,6 +41,7 @@ properties:
>> - qcom,x1e80100-qmp-gen3x2-pcie-phy
>> - qcom,x1e80100-qmp-gen4x2-pcie-phy
>> - qcom,x1e80100-qmp-gen4x4-pcie-phy
>> + - qcom,x1e80100-qmp-gen4x8-pcie-phy
>>
>> reg:
>> minItems: 1
>> @@ -172,6 +173,7 @@ allOf:
>> - qcom,sc8280xp-qmp-gen3x2-pcie-phy
>> - qcom,sc8280xp-qmp-gen3x4-pcie-phy
>> - qcom,x1e80100-qmp-gen4x4-pcie-phy
>> + - qcom,x1e80100-qmp-gen4x8-pcie-phy
>> then:
>> properties:
>> clocks:
>> @@ -201,6 +203,7 @@ allOf:
>> - qcom,sm8550-qmp-gen4x2-pcie-phy
>> - qcom,sm8650-qmp-gen4x2-pcie-phy
>> - qcom,x1e80100-qmp-gen4x2-pcie-phy
>> + - qcom,x1e80100-qmp-gen4x8-pcie-phy
>> then:
>> properties:
>> resets:
>> --
>> 2.34.1
>>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2024-09-19 13:48 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-13 8:37 [PATCH v2 0/5] Add support for PCIe3 on x1e80100 Qiang Yu
2024-09-13 8:37 ` [PATCH v2 1/5] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Qiang Yu
2024-09-13 13:37 ` Manivannan Sadhasivam
2024-09-19 13:47 ` Qiang Yu [this message]
2024-09-16 15:15 ` Krzysztof Kozlowski
2024-09-19 14:03 ` Qiang Yu
2024-09-19 15:37 ` Konrad Dybcio
2024-09-20 11:22 ` Krzysztof Kozlowski
2024-09-13 8:37 ` [PATCH v2 2/5] dt-bindings: PCI: qcom: Add OPP table for X1E80100 Qiang Yu
2024-09-13 12:30 ` Dmitry Baryshkov
2024-09-13 13:36 ` Manivannan Sadhasivam
2024-09-16 15:20 ` Krzysztof Kozlowski
2024-09-16 15:20 ` Krzysztof Kozlowski
2024-09-13 8:37 ` [PATCH v2 3/5] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3 Qiang Yu
2024-09-13 12:28 ` Dmitry Baryshkov
2024-09-16 23:29 ` Konrad Dybcio
2024-09-13 8:37 ` [PATCH v2 4/5] clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2 clocks Qiang Yu
2024-09-13 8:37 ` [PATCH v2 5/5] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Qiang Yu
2024-09-13 12:35 ` Dmitry Baryshkov
2024-09-13 13:57 ` Manivannan Sadhasivam
2024-09-19 14:05 ` Qiang Yu
2024-09-14 3:59 ` [PATCH v2 0/5] " Krishna Chaitanya Chundru
2024-09-19 14:14 ` Qiang Yu
2024-09-22 17:09 ` Manivannan Sadhasivam
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