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Tue, 6 Apr 2021 10:09:45 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 6 Apr 2021 10:09:45 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 136F9jlK119537; Tue, 6 Apr 2021 10:09:45 -0500 Date: Tue, 6 Apr 2021 20:39:44 +0530 From: Pratyush Yadav To: =?iso-8859-1?Q?P=E9ter?= Ujfalusi CC: Mauro Carvalho Chehab , Rob Herring , Kishon Vijay Abraham I , Vinod Koul , Maxime Ripard , Benoit Parrot , Hans Verkuil , Alexandre Courbot , Laurent Pinchart , Stanimir Varbanov , Helen Koike , Michael Tretter , Peter Chen , Chunfeng Yun , , , , , , Vignesh Raghavendra , Tomi Valkeinen Subject: Re: [PATCH 11/16] dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX Message-ID: <20210406150942.4kyjh2ehsvklupjr@ti.com> References: <20210330173348.30135-1-p.yadav@ti.com> <20210330173348.30135-12-p.yadav@ti.com> <78a5983c-04c8-4a4c-04fe-bb1f31e87375@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <78a5983c-04c8-4a4c-04fe-bb1f31e87375@gmail.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210406_160953_607298_405FF9AB X-CRM114-Status: GOOD ( 28.89 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 04/04/21 04:24PM, P=E9ter Ujfalusi wrote: > Hi Pratyush, > = > On 3/30/21 8:33 PM, Pratyush Yadav wrote: > > The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can > > have up to 32 threads but the current driver only supports using one. So > > add an entry for that one thread. > = > If you are absolutely sure that the other threads are not going to be > used, then: The opposite in fact. I do expect other threads to be used in the = future. But the current driver can only use one so I figured it is = better to add just the thread that is currently needed and then I can = always add the rest later. Why does this have to be a one-and-done deal? Is there anything wrong = with adding the other threads when the driver can actually use them? > Acked-by: Peter Ujfalusi > = > but I would consider adding the other threads if there is a chance that > the cs2rx will need to support it in the future. > = > > Signed-off-by: Pratyush Yadav > > --- > > drivers/dma/ti/k3-psil-j721e.c | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > = > > diff --git a/drivers/dma/ti/k3-psil-j721e.c b/drivers/dma/ti/k3-psil-j7= 21e.c > > index 7580870ed746..19ffa31e6dc6 100644 > > --- a/drivers/dma/ti/k3-psil-j721e.c > > +++ b/drivers/dma/ti/k3-psil-j721e.c > > @@ -58,6 +58,14 @@ > > }, \ > > } > > = > > +#define PSIL_CSI2RX(x) \ > > + { \ > > + .thread_id =3D x, \ > > + .ep_config =3D { \ > > + .ep_type =3D PSIL_EP_NATIVE, \ > > + }, \ > > + } > > + > > /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ > > static struct psil_ep j721e_src_ep_map[] =3D { > > /* SA2UL */ > > @@ -138,6 +146,8 @@ static struct psil_ep j721e_src_ep_map[] =3D { > > PSIL_PDMA_XY_PKT(0x4707), > > PSIL_PDMA_XY_PKT(0x4708), > > PSIL_PDMA_XY_PKT(0x4709), > > + /* CSI2RX */ > > + PSIL_CSI2RX(0x4940), > > /* CPSW9 */ > > PSIL_ETHERNET(0x4a00), > > /* CPSW0 */ > > = > = > -- = > P=E9ter -- = Regards, Pratyush Yadav Texas Instruments Inc. -- = linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy