From: Horatiu Vultur <horatiu.vultur@microchip.com>
To: <kishon@ti.com>, <vkoul@kernel.org>, <robh+dt@kernel.org>,
<andrew@lunn.ch>, <alexandre.belloni@bootlin.com>,
<kuba@kernel.org>, <linux-phy@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>,
Rob Herring <robh@kernel.org>
Subject: [PATCH resend v4 1/3] dt-bindings: phy: Add lan966x-serdes binding
Date: Tue, 16 Nov 2021 11:08:16 +0100 [thread overview]
Message-ID: <20211116100818.1615762-2-horatiu.vultur@microchip.com> (raw)
In-Reply-To: <20211116100818.1615762-1-horatiu.vultur@microchip.com>
Document the lan966x ethernet serdes phy driver bindings.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
---
.../phy/microchip,lan966x-serdes.yaml | 59 +++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml
diff --git a/Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml b/Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml
new file mode 100644
index 000000000000..6e914fbbac56
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip Lan966x Serdes controller
+
+maintainers:
+ - Horatiu Vultur <horatiu.vultur@microchip.com>
+
+description: |
+ Lan966x has 7 interfaces, consisting of 2 copper transceivers(CU),
+ 3 SERDES6G and 2 RGMII interfaces. Two of the SERDES6G support QSGMII.
+ Also it has 8 logical Ethernet ports which can be connected to these
+ interfaces. The Serdes controller will allow to configure these interfaces
+ and allows to "mux" the interfaces to different ports.
+
+ For simple selection of the interface that is used with a port, the
+ following macros are defined CU(X), SERDES6G(X), RGMII(X). Where X is a
+ number that represents the index of that interface type. For example
+ CU(1) means use interface copper transceivers 1. SERDES6G(2) means use
+ interface SerDes 2.
+
+properties:
+ $nodename:
+ pattern: "^serdes@[0-9a-f]+$"
+
+ compatible:
+ const: microchip,lan966x-serdes
+
+ reg:
+ items:
+ - description: HSIO registers
+ - description: HW_STAT register
+
+ '#phy-cells':
+ const: 2
+ description: |
+ - Input port to use for a given macro.
+ - The macro to be used. The macros are defined in
+ dt-bindings/phy/phy-lan966x-serdes.
+
+required:
+ - compatible
+ - reg
+ - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ serdes: serdes@e2004010 {
+ compatible = "microchip,lan966x-serdes";
+ reg = <0xe202c000 0x9c>, <0xe2004010 0x4>;
+ #phy-cells = <2>;
+ };
+
+...
--
2.33.0
--
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linux-phy@lists.infradead.org
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next prev parent reply other threads:[~2021-11-16 10:15 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-16 10:08 [PATCH resend v4 0/3] phy: Add driver for lan966x Serdes driver Horatiu Vultur
2021-11-16 10:08 ` Horatiu Vultur [this message]
2021-11-30 14:02 ` [PATCH resend v4 1/3] dt-bindings: phy: Add lan966x-serdes binding Geert Uytterhoeven
2021-11-30 16:11 ` Horatiu Vultur
2021-11-16 10:08 ` [PATCH resend v4 2/3] dt-bindings: phy: Add constants for lan966x serdes Horatiu Vultur
2021-11-16 10:08 ` [PATCH resend v4 3/3] phy: Add lan966x ethernet serdes PHY driver Horatiu Vultur
2021-11-16 10:21 ` [PATCH resend v4 0/3] phy: Add driver for lan966x Serdes driver Horatiu Vultur
2021-11-16 10:45 ` Vinod Koul
2021-11-16 10:56 ` Horatiu Vultur
2021-11-16 11:43 ` Vinod Koul
2021-11-16 11:52 ` Horatiu Vultur
2021-11-16 18:12 ` Alexandre Belloni
2021-11-16 22:05 ` Horatiu Vultur
2021-11-23 7:39 ` Vinod Koul
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