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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id h15-20020a4abb8f000000b00525398a1144sm2977105oop.32.2023.02.27.11.55.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 11:55:36 -0800 (PST) Received: (nullmailer pid 754635 invoked by uid 1000); Mon, 27 Feb 2023 19:55:35 -0000 Date: Mon, 27 Feb 2023 13:55:35 -0600 From: Rob Herring To: Manivannan Sadhasivam Cc: andersson@kernel.org, lpieralisi@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org, konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 02/13] dt-bindings: PCI: qcom: Add iommu properties Message-ID: <20230227195535.GA749409-robh@kernel.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> <20230224105906.16540-3-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230224105906.16540-3-manivannan.sadhasivam@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230227_115537_954797_F0BE40D7 X-CRM114-Status: GOOD ( 13.94 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Fri, Feb 24, 2023 at 04:28:55PM +0530, Manivannan Sadhasivam wrote: > Most of the PCIe controllers require iommu support to function properly. > So let's add them to the binding. > > Signed-off-by: Manivannan Sadhasivam > --- > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index a3639920fcbb..f48d0792aa57 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -64,6 +64,11 @@ properties: > > dma-coherent: true > > + iommus: > + maxItems: 1 > + > + iommu-map: true > + I think both properties together doesn't make sense unless the PCI host itself does DMA in addition to PCI bus devices doing DMA. Rob -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy