From: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
krishna.chundru@oss.qualcomm.com, quic_vbadigan@quicinc.com,
quic_nayiluri@quicinc.com, quic_ramkri@quicinc.com,
quic_nitegupt@quicinc.com,
Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
Subject: [PATCH 2/2] arm64: dts: qcom: sa8775p: Set max link speed to Gen4 for PCIe EP
Date: Wed, 23 Apr 2025 16:45:44 +0530 [thread overview]
Message-ID: <20250423-update_phy-v1-2-30eb51703bb8@oss.qualcomm.com> (raw)
In-Reply-To: <20250423-update_phy-v1-0-30eb51703bb8@oss.qualcomm.com>
The maximum link speed was previously restricted to Gen3 due to
the absence of Gen4 equalization support in the driver.
Add this change to set the maximum link speed to Gen4, as Gen4
equalization support has now been added into the driver.
Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 5bd0c03476b143444543c68cd1c1d475c3302555..65d9433a298f80eb782439120ad9c3c74025b441 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -6462,7 +6462,7 @@ pcie0_ep: pcie-ep@1c00000 {
power-domains = <&gcc PCIE_0_GDSC>;
phys = <&pcie0_phy>;
phy-names = "pciephy";
- max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
+ max-link-speed = <4>;
num-lanes = <2>;
linux,pci-domain = <0>;
@@ -6620,7 +6620,7 @@ pcie1_ep: pcie-ep@1c10000 {
power-domains = <&gcc PCIE_1_GDSC>;
phys = <&pcie1_phy>;
phy-names = "pciephy";
- max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
+ max-link-speed = <4>;
num-lanes = <4>;
linux,pci-domain = <1>;
--
2.25.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-04-23 13:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 11:15 [PATCH 0/2] Update PCIe PHY settings for SA8775P Mrinmay Sarkar
2025-04-23 11:15 ` [PATCH 1/2] phy: qcom: qmp-pcie: Update " Mrinmay Sarkar
2025-04-23 11:25 ` Konrad Dybcio
2025-04-23 13:37 ` Dmitry Baryshkov
[not found] ` <CAMyL0qMQCGE-JNwTjqJk8TrGLBDr_1W7Sv_nECkW9Xp1fXgeuw@mail.gmail.com>
2025-05-02 13:41 ` Konrad Dybcio
2025-04-23 11:15 ` Mrinmay Sarkar [this message]
2025-04-23 11:23 ` [PATCH 2/2] arm64: dts: qcom: sa8775p: Set max link speed to Gen4 for PCIe EP Konrad Dybcio
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