From: Wenbin Yao <wenbin.yao@oss.qualcomm.com>
To: "Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org,
Wenbin Yao <wenbin.yao@oss.qualcomm.com>,
konrad.dybcio@oss.qualcomm.com, qiang.yu@oss.qualcomm.com,
Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Subject: [PATCH v3 2/4] dt-bindings: PCI: qcom: Document the Glymur PCIe Controller
Date: Mon, 25 Aug 2025 23:01:48 -0700 [thread overview]
Message-ID: <20250825-glymur_pcie5-v3-2-5c1d1730c16f@oss.qualcomm.com> (raw)
In-Reply-To: <20250825-glymur_pcie5-v3-0-5c1d1730c16f@oss.qualcomm.com>
From: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
On the Qualcomm Glymur platform the PCIe host is compatible with the DWC
controller present on the X1E80100 platform. So document the PCIe
controllers found on Glymur and use the X1E80100 compatible string as a
fallback in the schema.
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Signed-off-by: Wenbin Yao <wenbin.yao@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
---
Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
index 257068a1826492a7071600d03ca0c99babb75bd9..8600f2c74cb81bcb924fa2035d992c3bd147db31 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
@@ -16,7 +16,12 @@ description:
properties:
compatible:
- const: qcom,pcie-x1e80100
+ oneOf:
+ - const: qcom,pcie-x1e80100
+ - items:
+ - enum:
+ - qcom,glymur-pcie
+ - const: qcom,pcie-x1e80100
reg:
minItems: 6
--
2.34.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-08-26 6:03 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-26 6:01 [PATCH v3 0/4] PCI: qcom: Add support for Glymur PCIe Gen5x4 Wenbin Yao
2025-08-26 6:01 ` [PATCH v3 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe PHY Wenbin Yao
2025-09-01 12:46 ` Vinod Koul
2025-08-26 6:01 ` Wenbin Yao [this message]
2025-08-26 6:01 ` [PATCH v3 3/4] phy: qcom-qmp: pcs: Add v8.50 register offsets Wenbin Yao
2025-08-26 6:01 ` [PATCH v3 4/4] phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen5x4 PHY Wenbin Yao
2025-08-26 6:19 ` Manivannan Sadhasivam
2025-08-27 1:45 ` Dmitry Baryshkov
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