From: Vladimir Oltean <vladimir.oltean@nxp.com>
To: Josua Mayer <josua@solid-run.com>
Cc: Conor Dooley <conor@kernel.org>,
"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH phy 13/14] dt-bindings: phy: lynx-28g: add compatible strings per SerDes and instantiation
Date: Tue, 9 Sep 2025 14:37:55 +0300 [thread overview]
Message-ID: <20250909113755.wjp5xeszjgbffakz@skbuf> (raw)
In-Reply-To: <5a295e63-f2a2-4aee-9472-389eabfdef41@solid-run.com>
On Fri, Sep 05, 2025 at 03:50:52PM +0000, Josua Mayer wrote:
> > Why stop the eq-params reuse at "per lane"? Why not make these global
> > nodes, like SFP cages? It's imaginable your pre-emphasis settings might
> > be the same across the board, for both SerDes #1 and #2 lanes.
> No special reason, I think you got the right idea.
Well, there is a reason why. You wouldn't put "fsl,blabla" vendor device
tree properties in a root device tree node, where it isn't namespaced by
the "fsl,lynx-28g" device. You'd only put them under the root node if
they were vendor-agnostic.
--
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next prev parent reply other threads:[~2025-09-09 17:14 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-04 15:43 [PATCH phy 00/14] Lynx 28G improvements part 1 Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 01/14] phy: lynx-28g: remove LYNX_28G_ prefix from register names Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 02/14] phy: lynx-28g: don't concatenate lynx_28g_lane_rmw() argument "reg" with "val" and "mask" Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 03/14] phy: lynx-28g: use FIELD_GET() and FIELD_PREP() Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 04/14] phy: lynx-28g: convert iowrite32() calls with magic values to macros Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 05/14] phy: lynx-28g: restructure protocol configuration register accesses Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 06/14] phy: lynx-28g: make lynx_28g_set_lane_mode() more systematic Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 07/14] phy: lynx-28g: refactor lane->interface to lane->mode Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 08/14] phy: lynx-28g: distinguish between 10GBASE-R and USXGMII Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 09/14] phy: lynx-28g: configure more equalization params for 1GbE and 10GbE Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 10/14] phy: lynx-28g: add support for 25GBASER Vladimir Oltean
2025-09-04 15:43 ` [PATCH phy 11/14] phy: lynx-28g: truly power the lanes up or down Vladimir Oltean
2025-09-04 15:44 ` [PATCH phy 12/14] phy: lynx-28g: implement phy_exit() operation Vladimir Oltean
2025-09-04 15:44 ` [PATCH phy 13/14] dt-bindings: phy: lynx-28g: add compatible strings per SerDes and instantiation Vladimir Oltean
2025-09-04 19:22 ` Conor Dooley
2025-09-05 10:49 ` Vladimir Oltean
2025-09-05 11:10 ` Josua Mayer
2025-09-05 11:37 ` Vladimir Oltean
2025-09-05 14:23 ` Josua Mayer
2025-09-05 14:44 ` Josua Mayer
2025-09-05 15:29 ` Vladimir Oltean
2025-09-05 15:50 ` Josua Mayer
2025-09-09 11:37 ` Vladimir Oltean [this message]
2025-09-05 18:58 ` Conor Dooley
2025-09-05 8:29 ` Krzysztof Kozlowski
2025-09-05 11:02 ` Vladimir Oltean
2025-09-05 15:41 ` Vladimir Oltean
2025-09-05 19:02 ` Conor Dooley
2025-09-08 9:37 ` Vladimir Oltean
2025-09-08 14:02 ` Josua Mayer
2025-09-08 15:37 ` Vladimir Oltean
2025-09-08 16:04 ` Josua Mayer
2025-09-09 11:35 ` Vladimir Oltean
2025-09-09 18:35 ` Conor Dooley
2025-09-09 18:58 ` Vladimir Oltean
2025-09-16 17:07 ` Vladimir Oltean
2025-09-17 10:47 ` Josua Mayer
2025-09-08 18:39 ` Conor Dooley
2025-09-04 15:44 ` [PATCH phy 14/14] phy: lynx-28g: probe on per-SoC and per-instance compatible strings Vladimir Oltean
2025-09-05 10:41 ` Ioana Ciornei
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