From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1FB0CAC5B7 for ; Thu, 25 Sep 2025 02:29:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fl/he+cxOl/OVBdF5MyCSwe4AwLqZ3/ncWFsELr7HQw=; b=cWJ2HfqGr59Agd pgBK0dszQAn0vCPrUq0zsrB8pIIzwmB2ok7B7IFGBeMgV3NjyK+84bQDER6+/MO/uLLhP0aHdXsB3 6W0QVwmyqwoG2BlmsXS1Vjr/2PUpW4pWCtq38CYD8jMN81aKgu9lCILirUYiVSaK0zLDtSlH9LH5L RPh3Uo7X61b4x2j4qgdv65twc4G+9zhTNzV97OLWh9ExwHf2wat6fCIKLziyq8v6iTkh8RpcR9SX/ qa9+NkE2aEiBoYYPPeGsPcDm9W+YeRveYv/iyiLVvMuwOVdKMgxMTZWqjMzP/HqdllguaHseODkXP qxHCapvCbT5DYUrm8LaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1v1bjL-00000005IuE-1Mbo; Thu, 25 Sep 2025 02:29:11 +0000 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1v1bjE-00000005Ins-3Zeh for linux-phy@lists.infradead.org; Thu, 25 Sep 2025 02:29:06 +0000 Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 58P1gY9s019919 for ; Thu, 25 Sep 2025 02:29:04 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=VBqRZ4jqbmE I9VbvT9u9nUsnAWuxILBOxsAEN8Vqeng=; b=cFn0xnR2YFeQ1fC4BTFjPpHkQ3i c/a1th47TEh8ARv/070i+Z4HMq01+FW3jbcnMYsirTq3vUNw/VzRxxwO0CYXjCyL E4uJXd9BLjilgoqStbDKBPHOwtykmL8cuQp5x2Zr8wKzRBzeKTDf6QQmJWTm4olq 1nXSOXoeOIF1+wbsX4BaN/0nlmHC1Y9Il41dhkUJTtuwLMp2/sUF51dJrWIBxYxd 82GG5DUNSFHIc2B4mHDCJFgchUX9aqOVCS9SVZQXxIpjvxiOzoVJBv9DG2uLqQyl qze265UKaMmHGnhzL/qtIas2TmU7LLLw4/RDWTzQkeahfy3VCpRCs73Fe7w== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49bjpdyngq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Thu, 25 Sep 2025 02:29:04 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-24457ef983fso8983815ad.0 for ; Wed, 24 Sep 2025 19:29:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758767343; x=1759372143; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VBqRZ4jqbmEI9VbvT9u9nUsnAWuxILBOxsAEN8Vqeng=; b=doDFasXJHkmxxDAdYUCXyFgEoK5tYQfqb9T9/Gun771qwkgTrsq6j3W2ibH2HZGhzD ux53782lWAgMlnLnmdUzWQikCtT7Yvn+6sEwDFqAv48Sx9c0GUVkqyM5WnoT2zlo1s0o b69NQTT5JyKeRA4WkmOR2TItCZwgulHPNC++JUlg6bs+P4ez2YdyawEHc1Q+Lt0KU5O6 Wtn9ROzPWb0DMirydcarI+f7Iv8AdAQ+iuftLif1U5KFqLARl7HBG3YAGK9koqnOZ4ik +2pdV6ogyEJEU2PP7HrknK9YNzXaRkRVlbSMTyJ+yZYWIWu3/NZzCclDZUbjiuCAPcjA 8DUQ== X-Forwarded-Encrypted: i=1; AJvYcCWWguWVZVfrUcXIUeR9L5YQGEKYOIp6g1x1JLTbFqKLTsj5eDfhKtg4Gd+qSAdPNIxEOWxW2v0Qv9s=@lists.infradead.org X-Gm-Message-State: AOJu0YxiLU76jZJsa+MGcndBq6DlrbiDIi690wJ4olT9SIkVpm1lppea Zyzvyh1SbrWaTQ6zZpmEx7rRpVAwnefJ5+i+SVHVhvTHtzDkhbJmRCOwCFFMsMOGsJANGy+uw4H RreEhQs1vPNqpSfNAYlx+0YnCknPGVGvUucGRa7oIAT4GX2CKsEZ6m6wNsgI0htoo6zKM X-Gm-Gg: ASbGncs/m/KEh6hhukQdm8JdAaA+gwJKxYi0a6Nl3LWS5CuunJtgGA6uq0/84oyQLZK 0BF7vGgY/vu+fWg3eXAH+0H9UrCqUAr8cOAN1gVlwBwAitFtJ9hr0iQ1df3lYqfFwdfztvAcbi2 4tTa403s+JXIbmKMmnZxJ+IH06lxdbv6966ibJmhDQk2c+vSHYfUwlmnC1fCa8YG+9QwDCxtgNI eCMWc/I+57k5wkXrdZXsPLZFh4geXg+7cUxXxWosXS7VLA5IVg6/64I1Bfhfha24jKWx+q+42QF o8bOs+7G3F5dnz+BufcqVLiJ7wpX6Lw9ipeCv73+ZMhq0beYFFQtFcMSFxtCmQXkDG+3lW2RgFg rO7Nw3LutX0WjXpsD X-Received: by 2002:a17:903:b8f:b0:276:484c:dc57 with SMTP id d9443c01a7336-27ed4a6f05amr20647925ad.49.1758767343445; Wed, 24 Sep 2025 19:29:03 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEche+C+5sN1BNC85bdn7M870OPrfbBs8K3NJONWhCxPZ55djGfs5gJwRduxxqE5JxvWBC7QA== X-Received: by 2002:a17:903:b8f:b0:276:484c:dc57 with SMTP id d9443c01a7336-27ed4a6f05amr20647635ad.49.1758767342884; Wed, 24 Sep 2025 19:29:02 -0700 (PDT) Received: from hu-wcheng-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33471d711ecsm499881a91.4.2025.09.24.19.29.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Sep 2025 19:29:02 -0700 (PDT) From: Wesley Cheng To: krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@oss.qualcomm.com, kishon@kernel.org, vkoul@kernel.org, gregkh@linuxfoundation.org, robh@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Wesley Cheng , Elson Roy Serrao Subject: [PATCH v3 06/10] phy: qualcomm: Update the QMP clamp register for V6 Date: Wed, 24 Sep 2025 19:28:46 -0700 Message-Id: <20250925022850.4133013-7-wesley.cheng@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250925022850.4133013-1-wesley.cheng@oss.qualcomm.com> References: <20250925022850.4133013-1-wesley.cheng@oss.qualcomm.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: l8xfzIIZ5xHqUZb39Wsibu-NvOVEyz4q X-Authority-Analysis: v=2.4 cv=Pc//hjhd c=1 sm=1 tr=0 ts=68d4a8f0 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=6zIwrvuT6hO6z1e-hKYA:9 a=GvdueXVYPmCkWapjIL-Q:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: l8xfzIIZ5xHqUZb39Wsibu-NvOVEyz4q X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTIzMDAyMCBTYWx0ZWRfX4w0vZxSAGrae sU6taIqaZxCqxI4/kCWLUDPkoTynrqdxKx4fYtZNmcSjUE/YlcxqwsZfcSgOFRelodRNAW//GnM KCmkfxVw4led/R76dXCT2npZcLZR2u9OK3DUmm9XNfIF3JoHVIOQrvEEncyAbbeGyla0G7AztJl j9Bdf6fSkvIdri61GynVd9t57zDkAun9LYjlORRldNUTkPaU92wY2E8c76uhfnsVF80YmpRBISx d1qix1UPmYt/SXJnYcGQ8k7CzAFKXZ4V/qtpphAED+STZpBTvcH/9v1iazeJ/Ri+Us654Pg1+YA qs4e6gjWNGhfQjFFHMb7VRTt4AgMlC3CdkNkUZAdBFbzNbGmPX2H71v71E2zpgsN84CX04X017J 26SdjsG/ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-24_07,2025-09-24_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 bulkscore=0 malwarescore=0 impostorscore=0 spamscore=0 suspectscore=0 clxscore=1015 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509230020 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250924_192904_894610_A04A01F5 X-CRM114-Status: GOOD ( 22.21 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org QMP combo phy V6 and above use the clamp register from the PCS always on (AON) address space. Update the driver accordingly. Reviewed-by: Dmitry Baryshkov Signed-off-by: Elson Roy Serrao Signed-off-by: Wesley Cheng --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 38 ++++++++++++++++--- .../phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h | 12 ++++++ .../phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h | 12 ++++++ 3 files changed, 57 insertions(+), 5 deletions(-) create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 7b5af30f1d02..1caa1fb6a8c7 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -29,7 +29,10 @@ #include "phy-qcom-qmp-common.h" #include "phy-qcom-qmp.h" +#include "phy-qcom-qmp-pcs-aon-v6.h" #include "phy-qcom-qmp-pcs-misc-v3.h" +#include "phy-qcom-qmp-pcs-misc-v4.h" +#include "phy-qcom-qmp-pcs-misc-v5.h" #include "phy-qcom-qmp-pcs-usb-v4.h" #include "phy-qcom-qmp-pcs-usb-v5.h" #include "phy-qcom-qmp-pcs-usb-v6.h" @@ -78,6 +81,7 @@ enum qphy_reg_layout { QPHY_PCS_AUTONOMOUS_MODE_CTRL, QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR, QPHY_PCS_POWER_DOWN_CONTROL, + QPHY_PCS_CLAMP_ENABLE, QPHY_COM_RESETSM_CNTRL, QPHY_COM_C_READY_STATUS, @@ -105,6 +109,8 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V3_PCS_LFPS_RXTERM_IRQ_CLEAR, + [QPHY_PCS_CLAMP_ENABLE] = QPHY_V3_PCS_MISC_CLAMP_ENABLE, + [QPHY_COM_RESETSM_CNTRL] = QSERDES_V3_COM_RESETSM_CNTRL, [QPHY_COM_C_READY_STATUS] = QSERDES_V3_COM_C_READY_STATUS, [QPHY_COM_CMN_STATUS] = QSERDES_V3_COM_CMN_STATUS, @@ -130,6 +136,8 @@ static const unsigned int qmp_v45_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, + [QPHY_PCS_CLAMP_ENABLE] = QPHY_V4_PCS_MISC_CLAMP_ENABLE, + [QPHY_COM_RESETSM_CNTRL] = QSERDES_V4_COM_RESETSM_CNTRL, [QPHY_COM_C_READY_STATUS] = QSERDES_V4_COM_C_READY_STATUS, [QPHY_COM_CMN_STATUS] = QSERDES_V4_COM_CMN_STATUS, @@ -155,6 +163,8 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, + [QPHY_PCS_CLAMP_ENABLE] = QPHY_V5_PCS_MISC_CLAMP_ENABLE, + [QPHY_COM_RESETSM_CNTRL] = QSERDES_V5_COM_RESETSM_CNTRL, [QPHY_COM_C_READY_STATUS] = QSERDES_V5_COM_C_READY_STATUS, [QPHY_COM_CMN_STATUS] = QSERDES_V5_COM_CMN_STATUS, @@ -180,6 +190,8 @@ static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, + [QPHY_PCS_CLAMP_ENABLE] = QPHY_V6_PCS_AON_CLAMP_ENABLE, + [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL, [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS, [QPHY_COM_CMN_STATUS] = QSERDES_V6_COM_CMN_STATUS, @@ -205,6 +217,8 @@ static const unsigned int qmp_v6_n4_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, + [QPHY_PCS_CLAMP_ENABLE] = QPHY_V6_PCS_AON_CLAMP_ENABLE, + [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL, [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS, [QPHY_COM_CMN_STATUS] = QSERDES_V6_COM_CMN_STATUS, @@ -1755,6 +1769,7 @@ struct qmp_combo_offsets { u16 usb3_serdes; u16 usb3_pcs_misc; u16 usb3_pcs; + u16 usb3_pcs_aon; u16 usb3_pcs_usb; u16 dp_serdes; u16 dp_txa; @@ -1836,6 +1851,7 @@ struct qmp_combo { void __iomem *tx2; void __iomem *rx2; void __iomem *pcs_misc; + void __iomem *pcs_aon; void __iomem *pcs_usb; void __iomem *dp_serdes; @@ -1960,6 +1976,7 @@ static const struct qmp_combo_offsets qmp_combo_offsets_v8 = { .usb3_serdes = 0x1000, .usb3_pcs_misc = 0x1c00, .usb3_pcs = 0x1e00, + .usb3_pcs_aon = 0x2000, .usb3_pcs_usb = 0x2100, .dp_serdes = 0x3000, .dp_txa = 0x3400, @@ -3345,6 +3362,7 @@ static void qmp_combo_enable_autonomous_mode(struct qmp_combo *qmp) const struct qmp_phy_cfg *cfg = qmp->cfg; void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs; void __iomem *pcs_misc = qmp->pcs_misc; + void __iomem *pcs_aon = qmp->pcs_aon; u32 intr_mask; if (qmp->phy_mode == PHY_MODE_USB_HOST_SS || @@ -3364,9 +3382,14 @@ static void qmp_combo_enable_autonomous_mode(struct qmp_combo *qmp) /* Enable required PHY autonomous mode interrupts */ qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], intr_mask); - /* Enable i/o clamp_n for autonomous mode */ - if (pcs_misc) - qphy_clrbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN); + /* + * Enable i/o clamp_n for autonomous mode + * V6 and later versions use pcs aon clamp register + */ + if (pcs_aon) + qphy_clrbits(pcs_aon, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN); + else if (pcs_misc) + qphy_clrbits(pcs_misc, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN); } static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp) @@ -3374,10 +3397,13 @@ static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp) const struct qmp_phy_cfg *cfg = qmp->cfg; void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs; void __iomem *pcs_misc = qmp->pcs_misc; + void __iomem *pcs_aon = qmp->pcs_aon; /* Disable i/o clamp_n on resume for normal mode */ - if (pcs_misc) - qphy_setbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN); + if (pcs_aon) + qphy_setbits(pcs_aon, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN); + else if (pcs_misc) + qphy_setbits(pcs_misc, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN); qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL | ALFPS_DTCT_EN); @@ -4075,6 +4101,8 @@ static int qmp_combo_parse_dt(struct qmp_combo *qmp) qmp->serdes = base + offs->usb3_serdes; qmp->pcs_misc = base + offs->usb3_pcs_misc; qmp->pcs = base + offs->usb3_pcs; + if (offs->usb3_pcs_aon) + qmp->pcs_aon = base + offs->usb3_pcs_aon; qmp->pcs_usb = base + offs->usb3_pcs_usb; qmp->dp_serdes = base + offs->dp_serdes; diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h new file mode 100644 index 000000000000..52db31a7cf22 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCS_AON_V6_H_ +#define QCOM_PHY_QMP_PCS_AON_V6_H_ + +/* Only for QMP V6 PHY - PCS_AON registers */ +#define QPHY_V6_PCS_AON_CLAMP_ENABLE 0x00 + +#endif diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h new file mode 100644 index 000000000000..77d04c6a1644 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCS_MISC_V5_H_ +#define QCOM_PHY_QMP_PCS_MISC_V5_H_ + +/* Only for QMP V5 PHY - PCS_MISC registers */ +#define QPHY_V5_PCS_MISC_CLAMP_ENABLE 0x0c + +#endif -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy