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Fri, 10 Oct 2025 13:16:14 -0700 (PDT) Date: Fri, 10 Oct 2025 20:16:03 +0000 Mime-Version: 1.0 X-Mailer: git-send-email 2.51.0.740.g6adb054d12-goog Message-ID: <20251010201607.1190967-1-royluo@google.com> Subject: [PATCH v3 0/4] Add Google Tensor SoC USB support From: Roy Luo To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Thinh Nguyen , Philipp Zabel , Peter Griffin , "=?UTF-8?q?Andr=C3=A9=20Draszik?=" , Tudor Ambarus Cc: Joy Chakraborty , Naveen Kumar , Roy Luo , Badhri Jagan Sridharan , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251010_131616_492557_520C41F0 X-CRM114-Status: GOOD ( 12.55 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org This series introduces USB controller and PHY support for the Google Tensor G5 SoC (codename: Laguna), a new generation of Google silicon first launched with Pixel 10 devices. The Tensor G5 represents a significant architectural overhaul compared to previous Tensor generations (e.g., gs101), which were based on Samsung Exynos IP. Although the G5 still utilizes Synopsys IP for the USB components, the custom top-level integration introduces a completely new design for clock, reset scheme, register interfaces and programming sequence, necessitating new drivers and device tree bindings. The USB subsystem on Tensor G5 integrates a Synopsys DWC3 USB 3.1 DRD-Single Port controller with hibernation support, and a custom PHY block comprising Synopsys eUSB2 and USB 3.2/DP combo PHYs. Co-developed-by: Joy Chakraborty Signed-off-by: Joy Chakraborty Co-developed-by: Naveen Kumar Signed-off-by: Naveen Kumar Signed-off-by: Roy Luo --- Changes in v3: - Align binding file name with the compatible string - Simplify the compatible property in binding to a single const value. - Add descriptive comments and use item list in binding. - Rename binding entries for clarity and brevity. Link to v2: https://lore.kernel.org/linux-usb/20251008060000.3136021-1-royluo@google.com Changes in v2: - Reorder patches to present bindings first. - Update dt binding compatible strings to be SoC-specific (google,gs5-*). - Better describe the hardware in dt binding commit messages and descriptions. - Adjust PHY driver commit subjects to use correct prefixes ("phy:"). - Move PHY driver from a subdirectory to drivers/phy/. Link to v1: https://lore.kernel.org/linux-usb/20251006232125.1833979-1-royluo@google.com/ --- Roy Luo (4): dt-bindings: usb: dwc3: Add Google Tensor G5 DWC3 usb: dwc3: Add Google Tensor SoC DWC3 glue driver dt-bindings: phy: google: Add Google Tensor G5 USB PHY phy: Add Google Tensor SoC USB PHY driver .../bindings/phy/google,gs5-usb-phy.yaml | 88 +++ .../bindings/usb/google,gs5-dwc3.yaml | 141 +++++ drivers/phy/Kconfig | 15 + drivers/phy/Makefile | 1 + drivers/phy/phy-google-usb.c | 286 +++++++++ drivers/usb/dwc3/Kconfig | 10 + drivers/usb/dwc3/Makefile | 1 + drivers/usb/dwc3/dwc3-google.c | 597 ++++++++++++++++++ 8 files changed, 1139 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/google,gs5-usb-phy.yaml create mode 100644 Documentation/devicetree/bindings/usb/google,gs5-dwc3.yaml create mode 100644 drivers/phy/phy-google-usb.c create mode 100644 drivers/usb/dwc3/dwc3-google.c base-commit: e5f0a698b34ed76002dc5cff3804a61c80233a7a -- 2.51.0.740.g6adb054d12-goog -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy