From: Rob Herring <robh@kernel.org>
To: Alex Elder <elder@riscstar.com>
Cc: krzk+dt@kernel.org, conor+dt@kernel.org, bhelgaas@google.com,
lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
vkoul@kernel.org, kishon@kernel.org, dlan@gentoo.org,
guodong@riscstar.com, pjw@kernel.org, palmer@dabbelt.com,
aou@eecs.berkeley.edu, alex@ghiti.fr, p.zabel@pengutronix.de,
christian.bruel@foss.st.com, shradha.t@samsung.com,
krishna.chundru@oss.qualcomm.com, qiang.yu@oss.qualcomm.com,
namcao@linutronix.de, thippeswamy.havalige@amd.com,
inochiama@gmail.com, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, linux-phy@lists.infradead.org,
spacemit@lists.linux.dev, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/7] dt-bindings: phy: spacemit: add SpacemiT PCIe/combo PHY
Date: Wed, 15 Oct 2025 09:52:17 -0500 [thread overview]
Message-ID: <20251015145217.GA3554740-robh@kernel.org> (raw)
In-Reply-To: <20251013153526.2276556-2-elder@riscstar.com>
On Mon, Oct 13, 2025 at 10:35:18AM -0500, Alex Elder wrote:
> Add the Device Tree binding for the PCIe/USB 3.0 combo PHY found in
> the SpacemiT K1 SoC. This is one of three PCIe PHYs, and is unusual
> in that only the combo PHY can perform a calibration step needed to
> determine settings used by the other two PCIe PHYs.
>
> Calibration must be done with the combo PHY in PCIe mode, and to allow
> this to occur independent of the eventual use for the PHY (PCIe or USB)
> some PCIe-related properties must be supplied: clocks; resets; and a
> syscon phandle.
>
> Signed-off-by: Alex Elder <elder@riscstar.com>
> ---
> v2: - Added '>' to the description, and reworded it a bit
> - Added an external oscillator clock, "refclk"
> - Renamed the "global" reset to be "phy"
> - Renamed a phandle property to be "spacemit,apmu"
> - Dropped the label and status property from the example
>
> .../bindings/phy/spacemit,k1-combo-phy.yaml | 114 ++++++++++++++++++
> 1 file changed, 114 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml
> new file mode 100644
> index 0000000000000..6e2f401b0ac27
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml
> @@ -0,0 +1,114 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/spacemit,k1-combo-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SpacemiT K1 PCIe/USB3 Combo PHY
> +
> +maintainers:
> + - Alex Elder <elder@riscstar.com>
> +
> +description: >
> + Of the three PHYs on the SpacemiT K1 SoC capable of being used for
> + PCIe, one is a combo PHY that can also be configured for use by a
> + USB 3 controller. Using PCIe or USB 3 is a board design decision.
> +
> + The combo PHY is also the only PCIe PHY that is able to determine
> + PCIe calibration values to use, and this must be determined before
> + the other two PCIe PHYs can be used. This calibration must be
> + performed with the combo PHY in PCIe mode, and is this is done
> + when the combo PHY is probed.
> +
> + The combo PHY uses an external oscillator as a reference clock.
> + During normal operation, the PCIe or USB port driver is responsible
> + for ensuring all other clocks needed by a PHY are enabled, and all
> + resets affecting the PHY are deasserted. However, for the combo
> + PHY to perform calibration independent of whether it's later used
> + for PCIe or USB, all PCIe mode clocks and resets must be defined.
> +
> +properties:
> + compatible:
> + const: spacemit,k1-combo-phy
> +
> + reg:
> + items:
> + - description: PHY control registers
> +
> + clocks:
> + items:
> + - description: External oscillator used by the PHY PLL
> + - description: DWC PCIe Data Bus Interface (DBI) clock
> + - description: DWC PCIe application AXI-bus Master interface clock
> + - description: DWC PCIe application AXI-bus slave interface clock
> +
> + clock-names:
> + items:
> + - const: refclk
> + - const: dbi
> + - const: mstr
> + - const: slv
> +
> + resets:
> + items:
> + - description: DWC PCIe Data Bus Interface (DBI) reset
> + - description: DWC PCIe application AXI-bus Master interface reset
> + - description: DWC PCIe application AXI-bus slave interface reset
> + - description: PHY reset; must be deasserted for PHY to function
> +
> + reset-names:
> + items:
> + - const: dbi
> + - const: mstr
> + - const: slv
> + - const: phy
I think phy should be first as that's the main one to the phy and the
others are somewhat questionable. Otherwise,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-10-15 14:52 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-13 15:35 [PATCH v2 0/7] Introduce SpacemiT K1 PCIe phy and host controller Alex Elder
2025-10-13 15:35 ` [PATCH v2 1/7] dt-bindings: phy: spacemit: add SpacemiT PCIe/combo PHY Alex Elder
2025-10-15 14:52 ` Rob Herring [this message]
2025-10-17 16:20 ` Alex Elder
2025-10-13 15:35 ` [PATCH v2 2/7] dt-bindings: phy: spacemit: introduce PCIe PHY Alex Elder
2025-10-15 16:41 ` Rob Herring (Arm)
2025-10-17 16:20 ` Alex Elder
2025-10-13 15:35 ` [PATCH v2 3/7] dt-bindings: pci: spacemit: introduce PCIe host controller Alex Elder
2025-10-14 1:55 ` Yao Zi
2025-10-14 1:57 ` Alex Elder
2025-10-15 16:47 ` Rob Herring
2025-10-17 16:20 ` Alex Elder
2025-10-26 16:38 ` Manivannan Sadhasivam
2025-10-27 22:24 ` Alex Elder
2025-10-28 5:58 ` Manivannan Sadhasivam
2025-10-30 0:10 ` Alex Elder
2025-10-13 15:35 ` [PATCH v2 4/7] phy: spacemit: introduce PCIe/combo PHY Alex Elder
2025-10-15 21:51 ` Aurelien Jarno
2025-10-17 16:21 ` Alex Elder
2025-10-13 15:35 ` [PATCH v2 5/7] PCI: spacemit: introduce SpacemiT PCIe host driver Alex Elder
2025-10-26 16:55 ` Manivannan Sadhasivam
2025-10-27 22:24 ` Alex Elder
2025-10-28 7:06 ` Manivannan Sadhasivam
2025-10-30 0:10 ` Alex Elder
2025-10-31 6:05 ` Manivannan Sadhasivam
2025-10-31 13:38 ` Alex Elder
2025-10-13 15:35 ` [PATCH v2 6/7] riscv: dts: spacemit: add a PCIe regulator Alex Elder
2025-10-13 15:35 ` [PATCH v2 7/7] riscv: dts: spacemit: PCIe and PHY-related updates Alex Elder
2025-10-16 16:47 ` [PATCH v2 0/7] Introduce SpacemiT K1 PCIe phy and host controller Aurelien Jarno
2025-10-17 16:21 ` Alex Elder
2025-10-28 17:59 ` Aurelien Jarno
2025-10-28 18:42 ` Johannes Erdfelt
2025-10-28 19:10 ` Alex Elder
2025-10-28 20:48 ` Johannes Erdfelt
2025-10-28 20:49 ` Alex Elder
2025-10-30 16:41 ` Manivannan Sadhasivam
2025-10-30 17:49 ` Aurelien Jarno
2025-10-31 6:10 ` Manivannan Sadhasivam
2025-11-03 16:42 ` Alex Elder
2025-10-28 21:08 ` Aurelien Jarno
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