From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A480CCD185 for ; Wed, 15 Oct 2025 16:47:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LBFsy5tFRGH/lf/wUVsf0BF0AAQG+L5pcRWLZyrJYUE=; b=4KSAw8pnvaW/B8 hVI+OrrdU2EdBbiLSRkFA0p1KPR4vqQrRuyCPJ6lTD3b31Ol9KCgnIp8uQH6bL8tjiYfR1Vlnp38x VR/MNffNKiEspTvq6uDAkH/0gIzTUEKGebldWdgO0E3QrJMSEjm9nw+mC8WI6oCsP8p6/QH2YcEWj PaVObwfJ8/7Slj4j6KGBUPMuR/mQ1jS/QjosW9wwR06IUCm1k8fZHzOVgXdd+VPOL12/jMbBTzNJR bveUuvAjqqbOXVyPUT1h6KAfw7WOCKldQ7T92s+1hK8a+8byr3/KFRWYiJt8atEdv6L255VhksN4c hXCOWF3wT43Qr34awGpg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1v94f2-00000002LqK-30yG; Wed, 15 Oct 2025 16:47:36 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1v94ez-00000002LpM-3XLI; Wed, 15 Oct 2025 16:47:35 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id BB63544C8D; Wed, 15 Oct 2025 16:47:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5F441C4CEF8; Wed, 15 Oct 2025 16:47:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1760546852; bh=SYgfDbfizk0X/84j7ocQGVtNofPjS5i2LN9U4BzBYL8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=EeCZ+gedlVwAatBEieaaUcV2n5mIE/fEI50/OwUwjfo/tOturTyZAdsGckZjqo8Q2 5jZYYH8MvUvh5PtRiiSmrWhFabgziuKQdEz0yMI2vYLzmATjNrHTBYKBLOPQDJEt4L NrVlGpCsSYAa0J00/aqVqsx61Tmc7Ois53cHqZtkHP8SlCISXtywyfocWSyqhsagS3 NICYMnbQrz88kkIvGDr4o2Mj4sQgBh/Gw7AgGWphebXNvz56mhdjj6rWXM0y+SYW6N +g2wioFnvn6vPmgwQDOQC02ta+peazT5SVVgSlF7zm2/yWAOq+wpzzbFBDUIyLFKUu OBPBLverjqImA== Date: Wed, 15 Oct 2025 11:47:30 -0500 From: Rob Herring To: Alex Elder Cc: krzk+dt@kernel.org, conor+dt@kernel.org, bhelgaas@google.com, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, vkoul@kernel.org, kishon@kernel.org, dlan@gentoo.org, guodong@riscstar.com, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, p.zabel@pengutronix.de, christian.bruel@foss.st.com, shradha.t@samsung.com, krishna.chundru@oss.qualcomm.com, qiang.yu@oss.qualcomm.com, namcao@linutronix.de, thippeswamy.havalige@amd.com, inochiama@gmail.com, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, spacemit@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 3/7] dt-bindings: pci: spacemit: introduce PCIe host controller Message-ID: <20251015164730.GA4032812-robh@kernel.org> References: <20251013153526.2276556-1-elder@riscstar.com> <20251013153526.2276556-4-elder@riscstar.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20251013153526.2276556-4-elder@riscstar.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251015_094733_923505_EE1B5526 X-CRM114-Status: GOOD ( 23.22 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Mon, Oct 13, 2025 at 10:35:20AM -0500, Alex Elder wrote: > Add the Device Tree binding for the PCIe root complex found on the > SpacemiT K1 SoC. This device is derived from the Synopsys Designware > PCIe IP. It supports up to three PCIe ports operating at PCIe gen 2 > link speeds (5 GT/sec). One of the ports uses a combo PHY, which is > typically used to support a USB 3 port. > > Signed-off-by: Alex Elder > --- > v2: - Renamed the binding, using "host controller" > - Added '>' to the description, and reworded it a bit > - Added reference to /schemas/pci/snps,dw-pcie.yaml > - Fixed and renamed the compatible string > - Renamed the PMU property, and fixed its description > - Consistently omit the period at the end of descriptions > - Renamed the "global" clock to be "phy" > - Use interrupts rather than interrupts-extended, and name the > one interrupt "msi" to make clear its purpose > - Added a vpcie3v3-supply property > - Dropped the max-link-speed property > - Changed additionalProperties to unevaluatedProperties > - Dropped the label and status property from the example > > .../bindings/pci/spacemit,k1-pcie-host.yaml | 156 ++++++++++++++++++ > 1 file changed, 156 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml > > diff --git a/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml b/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml > new file mode 100644 > index 0000000000000..87745d49c53a1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml > @@ -0,0 +1,156 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/spacemit,k1-pcie-host.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: SpacemiT K1 PCI Express Host Controller > + > +maintainers: > + - Alex Elder > + > +description: > > + The SpacemiT K1 SoC PCIe host controller is based on the Synopsys > + DesignWare PCIe IP. The controller uses the DesignWare built-in > + MSI interrupt controller, and supports 256 MSIs. > + > +allOf: > + - $ref: /schemas/pci/snps,dw-pcie.yaml# > + > +properties: > + compatible: > + const: spacemit,k1-pcie > + > + reg: > + items: > + - description: DesignWare PCIe registers > + - description: ATU address space > + - description: PCIe configuration space > + - description: Link control registers > + > + reg-names: > + items: > + - const: dbi > + - const: atu > + - const: config > + - const: link > + > + spacemit,apmu: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + description: > + A phandle that refers to the APMU system controller, whose > + regmap is used in managing resets and link state, along with > + and offset of its reset control register. > + items: > + - items: > + - description: phandle to APMU system controller > + - description: register offset > + > + clocks: > + items: > + - description: DWC PCIe Data Bus Interface (DBI) clock > + - description: DWC PCIe application AXI-bus master interface clock > + - description: DWC PCIe application AXI-bus slave interface clock > + > + clock-names: > + items: > + - const: dbi > + - const: mstr > + - const: slv > + > + resets: > + items: > + - description: DWC PCIe Data Bus Interface (DBI) reset > + - description: DWC PCIe application AXI-bus master interface reset > + - description: DWC PCIe application AXI-bus slave interface reset > + - description: Global reset; must be deasserted for PHY to function > + > + reset-names: > + items: > + - const: dbi > + - const: mstr > + - const: slv > + - const: phy You expect/need the phy driver and PCIe driver to both reset the PHY? You should do that indirectly with the PHY API when you reset the controller. Rob -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy