From: Alex Elder <elder@riscstar.com>
To: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org
Cc: ziyao@disroot.org, dlan@gentoo.org, guodong@riscstar.com,
devicetree@vger.kernel.org, linux-phy@lists.infradead.org,
spacemit@lists.linux.dev, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v7 2/5] dt-bindings: phy: spacemit: Introduce PCIe PHY
Date: Thu, 18 Dec 2025 09:12:28 -0600 [thread overview]
Message-ID: <20251218151235.454997-3-elder@riscstar.com> (raw)
In-Reply-To: <20251218151235.454997-1-elder@riscstar.com>
Add the Device Tree binding for two PCIe PHYs present on the SpacemiT
K1 SoC. These PHYs are dependent on a separate combo PHY, which
determines at probe time the calibration values used by the PCIe-only
PHYs.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Alex Elder <elder@riscstar.com>
---
.../bindings/phy/spacemit,k1-pcie-phy.yaml | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml
new file mode 100644
index 0000000000000..019b28349be75
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/spacemit,k1-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT K1 PCIe PHY
+
+maintainers:
+ - Alex Elder <elder@riscstar.com>
+
+description: >
+ Two PHYs on the SpacemiT K1 SoC used for only for PCIe. These
+ PHYs must be configured using calibration values that are
+ determined by a third "combo PHY". The combo PHY determines
+ these calibration values during probe so they can be used for
+ the two PCIe-only PHYs.
+
+ The PHY uses an external oscillator as a reference clock. During
+ normal operation, the PCIe host driver is responsible for ensuring
+ all other clocks needed by a PHY are enabled, and all resets
+ affecting the PHY are deasserted.
+
+properties:
+ compatible:
+ const: spacemit,k1-pcie-phy
+
+ reg:
+ items:
+ - description: PHY control registers
+
+ clocks:
+ items:
+ - description: External oscillator used by the PHY PLL
+
+ clock-names:
+ const: refclk
+
+ resets:
+ items:
+ - description: PHY reset; remains deasserted after initialization
+
+ reset-names:
+ const: phy
+
+ "#phy-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/spacemit,k1-syscon.h>
+ phy@c0c10000 {
+ compatible = "spacemit,k1-pcie-phy";
+ reg = <0xc0c10000 0x1000>;
+ clocks = <&vctcxo_24m>;
+ clock-names = "refclk";
+ resets = <&syscon_apmu RESET_PCIE1_GLOBAL>;
+ reset-names = "phy";
+ #phy-cells = <0>;
+ };
--
2.48.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-12-18 15:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-18 15:12 [PATCH v7 0/5] Introduce SpacemiT K1 PCIe phy support Alex Elder
2025-12-18 15:12 ` [PATCH v7 1/5] dt-bindings: phy: spacemit: Add SpacemiT PCIe/combo PHY Alex Elder
2025-12-18 15:12 ` Alex Elder [this message]
2025-12-18 15:12 ` [PATCH v7 3/5] phy: spacemit: Introduce " Alex Elder
2025-12-19 12:19 ` [PATCH v7 0/5] Introduce SpacemiT K1 PCIe phy support Yixun Lan
2025-12-19 15:28 ` Alex Elder
2025-12-23 17:44 ` (subset) " Vinod Koul
2025-12-24 2:43 ` Yixun Lan
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