From: Bjorn Helgaas <helgaas@kernel.org>
To: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Cc: "Vinod Koul" <vkoul@kernel.org>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH 2/5] PCI: dwc: Add support for retaining link during host init
Date: Fri, 9 Jan 2026 09:53:50 -0600 [thread overview]
Message-ID: <20260109155350.GA546142@bhelgaas> (raw)
In-Reply-To: <20260109-link_retain-v1-2-7e6782230f4b@oss.qualcomm.com>
On Fri, Jan 09, 2026 at 12:51:07PM +0530, Krishna Chaitanya Chundru wrote:
> Some platforms keep the PCIe link up across bootloader and kernel
> handoff. In such cases, reinitializing the root complex is unnecessary
> if the DWC glue drivers wants to retain the PCIe link.
>
> Introduce a link_retain flag in struct dw_pcie_rp to indicate that
> the link should be preserved. When this flag is set by DWC glue drivers,
> skip dw_pcie_setup_rc() and only initialize MSI, avoiding redundant
> configuration steps.
It sounds like this adds an assumption that the bootloader
initialization is the same as what dw_pcie_setup_rc() would do. This
assumption also applies to future changes in dw_pcie_setup_rc().
It looks like you mention an issue like this in [PATCH 4/5]; DBI & ATU
base being different than "HLOS" (whatever that is). This sounds like
a maintenance issue keeping bootloader and kernel driver assumptions
synchronized.
Is there something in dw_pcie_setup_rc() that takes a lot of time or
forces a link retrain? You mentioned some clock and GENPD issues in
the cover letter, but I don't see the connection between those and
dw_pcie_setup_rc(). If there is a connection, please include it in
this commit log and include a code comment about why
dw_pcie_setup_rc() is being skipped.
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 11 ++++++++---
> drivers/pci/controller/dwc/pcie-designware.h | 1 +
> 2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 372207c33a857b4c98572bb1e9b61fa0080bc871..d050df3f22e9507749a8f2fedd4c24fca43fb410 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -655,9 +655,14 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> if (ret)
> goto err_free_msi;
>
> - ret = dw_pcie_setup_rc(pp);
> - if (ret)
> - goto err_remove_edma;
> + if (!pp->link_retain) {
Use positive logic if possible (test "pp->link_retain" instead of
"!pp->link_retain").
I suspect this would be more maintainable if you identified specific
things *inside* dw_pcie_setup_rc() that need to be skipped, and you
added tests there.
> + ret = dw_pcie_setup_rc(pp);
> + if (ret)
> + goto err_remove_edma;
> + } else {
> + dw_pcie_msi_init(pp);
> + }
> +
>
> if (!dw_pcie_link_up(pci)) {
> ret = dw_pcie_start_link(pci);
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 31685951a080456b8834aab2bf79a36c78f46639..8acab751b66a06e8322e027ab55dc0ecfdcf634c 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -439,6 +439,7 @@ struct dw_pcie_rp {
> struct pci_config_window *cfg;
> bool ecam_enabled;
> bool native_ecam;
> + bool link_retain;
> };
>
> struct dw_pcie_ep_ops {
>
> --
> 2.34.1
>
--
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next prev parent reply other threads:[~2026-01-09 15:53 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 7:21 [PATCH 0/5] PCI: qcom: Add link retention support Krishna Chaitanya Chundru
2026-01-09 7:21 ` [PATCH 1/5] phy: qcom: qmp-pcie: Skip PHY reset if already up Krishna Chaitanya Chundru
2026-01-09 9:23 ` Abel Vesa
2026-01-09 13:08 ` Dmitry Baryshkov
2026-01-09 13:10 ` Neil Armstrong
2026-01-09 14:03 ` Dmitry Baryshkov
2026-01-14 9:36 ` Vinod Koul
2026-02-16 14:53 ` Manivannan Sadhasivam
2026-02-16 14:56 ` Konrad Dybcio
2026-01-09 7:21 ` [PATCH 2/5] PCI: dwc: Add support for retaining link during host init Krishna Chaitanya Chundru
2026-01-09 15:53 ` Bjorn Helgaas [this message]
2026-01-12 11:29 ` Konrad Dybcio
2026-01-22 8:55 ` Krishna Chaitanya Chundru
2026-01-09 7:21 ` [PATCH 3/5] PCI: qcom: Keep PERST# GPIO state as-is during probe Krishna Chaitanya Chundru
2026-01-09 11:14 ` Konrad Dybcio
2026-02-16 14:58 ` Manivannan Sadhasivam
2026-01-09 7:21 ` [PATCH 4/5] PCI: qcom: Add link retention support Krishna Chaitanya Chundru
2026-02-16 15:08 ` Manivannan Sadhasivam
2026-01-09 7:21 ` [PATCH 5/5] PCI: qcom: enable Link retain logic for Hamoa Krishna Chaitanya Chundru
2026-01-09 13:09 ` Dmitry Baryshkov
2026-01-22 8:59 ` Krishna Chaitanya Chundru
2026-01-15 2:16 ` [PATCH 0/5] PCI: qcom: Add link retention support Qiang Yu
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