* [PATCH] phy: phy-mtk-tphy: Update names and format of kernel-doc comments
@ 2026-02-23 7:10 Vinod Koul
2026-02-27 15:29 ` Vinod Koul
0 siblings, 1 reply; 2+ messages in thread
From: Vinod Koul @ 2026-02-23 7:10 UTC (permalink / raw)
To: linux-phy; +Cc: Neil Armstrong, Vladimir Oltean, Vinod Koul, chunfeng.yun
mtk_phy_pdata documentation does not use correct tag for struct, while at
it fix one of member wrongly documented.
Warning: drivers/phy/mediatek/phy-mtk-tphy.c:289 cannot understand function prototype: 'struct mtk_phy_pdata'
Warning: drivers/phy/mediatek/phy-mtk-tphy.c:296 struct member 'slew_ref_clock_mhz' not described in 'mtk_phy_pdata'
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/mediatek/phy-mtk-tphy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index f6504e0ecd1a..acf506529507 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -276,14 +276,14 @@ enum mtk_phy_version {
};
/**
- * mtk_phy_pdata - SoC specific platform data
+ * struct mtk_phy_pdata - SoC specific platform data
* @avoid_rx_sen_degradation: Avoid TX Sensitivity level degradation (MT6795/8173 only)
* @sw_pll_48m_to_26m: Workaround for V3 IP (MT8195) - switch the 48MHz PLL from
* fractional mode to integer to output 26MHz for U2PHY
* @sw_efuse_supported: Switches off eFuse auto-load from PHY and applies values
* read from different nvmem (usually different eFuse array)
* that is pointed at in the device tree node for this PHY
- * @slew_ref_clk_mhz: Default reference clock (in MHz) for slew rate calibration
+ * @slew_ref_clock_mhz: Default reference clock (in MHz) for slew rate calibration
* @slew_rate_coefficient: Coefficient for slew rate calibration
* @version: PHY IP Version
*/
--
2.43.0
--
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2026-02-23 7:10 [PATCH] phy: phy-mtk-tphy: Update names and format of kernel-doc comments Vinod Koul
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