Re: [PATCH 4/4] phy: qualcomm: qmp-combo: Add support for Hawi SoC

Dmitry Baryshkov
2026-04-28T11:41:04Z

On Mon, Apr 27, 2026 at 02:42:17PM -0700, Ronak Raheja wrote:
> Add support for the USB3-DP combo PHY found on Hawi platform.
>
> The QMP PHY for Hawi uses QSERDES V10 register layouts. Add the required
> PHY sequences from the hardware programming guide and new V10 register
> header files. Also add a new v10 offset structure to incorporate the new
> COM AON register module.

Was this tested with the DP too or did you test only the USB part?

>
> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> .../phy/qualcomm/phy-qcom-qmp-com-aon-v10.h | 15 ++
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 231 +++++++++++++++++-
> .../phy/qualcomm/phy-qcom-qmp-dp-phy-v10.h | 15 ++
> .../phy/qualcomm/phy-qcom-qmp-pcs-aon-v10.h | 13 +
> .../phy/qualcomm/phy-qcom-qmp-pcs-usb-v10.h | 19 ++
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-v10.h | 34 +++
> .../qualcomm/phy-qcom-qmp-qserdes-com-v10.h | 89 +++++++
> .../qualcomm/phy-qcom-qmp-qserdes-txrx-v10.h | 89 +++++++
> drivers/phy/qualcomm/phy-qcom-qmp.h | 5 +
> 9 files changed, 506 insertions(+), 4 deletions(-)
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-com-aon-v10.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-dp-phy-v10.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v10.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v10.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v10.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v10.h
> create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v10.h
>
> @@ -2198,6 +2368,7 @@ struct qmp_combo_offsets {
> u16 dp_txa;
> u16 dp_txb;
> u16 dp_dp_phy;
> + u16 aon_toggle;

Are there (or will there) be any other regs? Is it just one-register
space?

> };
>
> struct qmp_phy_cfg {
> @@ -2705,6 +2895,27 @@ static const struct qmp_phy_cfg x1e80100_usb3dpphy_cfg = {
> .regs = qmp_v6_n4_usb3phy_regs_layout,
> };
>
> +static const struct qmp_phy_cfg hawi_usb3dpphy_cfg = {
> + .offsets = &qmp_combo_offsets_v10,
> +
> + .serdes_tbl = hawi_usb3_serdes_tbl,
> + .serdes_tbl_num = ARRAY_SIZE(hawi_usb3_serdes_tbl),
> + .tx_tbl = hawi_usb3_tx_tbl,
> + .tx_tbl_num = ARRAY_SIZE(hawi_usb3_tx_tbl),
> + .rx_tbl = hawi_usb3_rx_tbl,
> + .rx_tbl_num = ARRAY_SIZE(hawi_usb3_rx_tbl),
> + .pcs_tbl = hawi_usb3_pcs_tbl,
> + .pcs_tbl_num = ARRAY_SIZE(hawi_usb3_pcs_tbl),
> + .pcs_usb_tbl = hawi_usb3_pcs_usb_tbl,
> + .pcs_usb_tbl_num = ARRAY_SIZE(hawi_usb3_pcs_usb_tbl),
> +
> + .regs = qmp_v10_usb3phy_regs_layout,
> + .reset_list = msm8996_usb3phy_reset_l,
> + .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
> + .vreg_list = qmp_phy_vreg_l,
> + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),

No DP counterpart and no mention of it in the commit message.

> +};
> +
> static const struct qmp_phy_cfg sm6350_usb3dpphy_cfg = {
> .offsets = &qmp_combo_offsets_v3,
>

--
With best wishes
Dmitry