From: Krzysztof Kozlowski <krzk@kernel.org>
To: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/2] dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the ipq5210 QMP PCIe PHY
Date: Thu, 11 Jun 2026 10:21:10 +0200 [thread overview]
Message-ID: <20260611-talkative-formidable-fennec-ad135d@quoll> (raw)
In-Reply-To: <20260610-pcie-phy-v3-1-334011b378d6@oss.qualcomm.com>
On Wed, Jun 10, 2026 at 04:46:08PM +0530, Varadarajan Narayanan wrote:
> Document the PCIe phys on the ipq5210 platform. The 2 lane phy uses the
> ipq9574 as fallback. The single lane phy is documented separately.
Drop
>
> The ipq5210 has one dual lane and one single lane PCIe phy.
>
> The dual lane phy is similar to the dual lane phy present in ipq9574. Hence
> qcom,ipq5210-qmp-gen3x2-pcie-phy is documented with ipq9574's dual lane phy
> as fallback compatible.
You are repeating the first paragraph.
>
> The single lane phy (qcom,ipq5210-qmp-gen3x1-pcie-phy) is documented as
> specific compatible.
Because? I asked last time - do not repeat the diff. You explain here
why it is not using fallback.
Best regards,
Krzysztof
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next prev parent reply other threads:[~2026-06-11 8:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-10 11:16 [PATCH v3 0/2] Enable the QMP PCIe PHY present in Qualcomm ipq5210 SoC Varadarajan Narayanan
2026-06-10 11:16 ` [PATCH v3 1/2] dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the ipq5210 QMP PCIe PHY Varadarajan Narayanan
2026-06-11 8:21 ` Krzysztof Kozlowski [this message]
2026-06-10 11:16 ` [PATCH v3 2/2] phy: qcom-qmp-pcie: Add support for ipq5210 PCIe phys Varadarajan Narayanan
2026-06-12 7:13 ` Dmitry Baryshkov
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