From: sashiko-bot@kernel.org
To: "Radhey Shyam Pandey" <radhey.shyam.pandey@amd.com>
Cc: neil.armstrong@linaro.org, vkoul@kernel.org, olteanv@gmail.com,
linux-phy@lists.infradead.org
Subject: Re: [RESEND PATCH 2/3] phy: zynqmp: use read-modify-write for SERDES scrambler bypass
Date: Sat, 27 Jun 2026 16:02:14 +0000 [thread overview]
Message-ID: <20260627160215.6CD681F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260627155229.2791113-3-radhey.shyam.pandey@amd.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] The error code from clk_prepare_enable() is not propagated, causing a false success return.
- [High] Missing clk_disable_unprepare() on error paths causes a clock resource leak.
--
commit 5cbba5539e34550743b9636376f1a41a65d04bb8
Author: Nava kishore Manne <nava.kishore.manne@amd.com>
phy: zynqmp: use read-modify-write for SERDES scrambler bypass
This commit switches xpsgtr_bypass_scrambler_8b10b() to use
xpsgtr_clr_set_phy() instead of xpsgtr_write_phy(). This modifies only the
bypass bits while preserving the rest of the register fields.
> diff --git a/drivers/phy/xilinx/phy-zynqmp.c b/drivers/phy/xilinx/phy-zynqmp.c
> index c037d7c13d485..6c56c4df8523c 100644
> --- a/drivers/phy/xilinx/phy-zynqmp.c
> +++ b/drivers/phy/xilinx/phy-zynqmp.c
> @@ -505,8 +505,12 @@ static void xpsgtr_lane_set_protocol(struct xpsgtr_phy *gtr_phy)
> /* Bypass (de)scrambler and 8b/10b decoder and encoder. */
> static void xpsgtr_bypass_scrambler_8b10b(struct xpsgtr_phy *gtr_phy)
> {
[ ... ]
> static int xpsgtr_phy_init(struct phy *phy)
> {
> struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
> struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
> int ret = 0;
>
> mutex_lock(>r_dev->gtr_mutex);
>
> /* Configure and enable the clock when peripheral phy_init call */
> if (clk_prepare_enable(gtr_dev->clk[gtr_phy->refclk]))
> goto out;
[Severity: High]
This is a pre-existing issue, but does this error path fail to set the
return code?
When clk_prepare_enable() fails, it jumps to 'out' while 'ret'
is still 0, leading to a false success return. This can cause the PHY
framework to assume the PHY is initialized.
>
> /* Skip initialization if not required. */
> if (!xpsgtr_phy_init_required(gtr_phy))
> goto out;
>
> if (gtr_dev->tx_term_fix) {
> ret = xpsgtr_phy_tx_term_fix(gtr_phy);
> if (ret < 0)
> goto out;
[Severity: High]
This is a pre-existing issue, but does this error path jump to 'out' without
disabling the previously enabled clock?
Because 'ret' is negative here, the PHY framework considers the
initialization failed and won't call xpsgtr_phy_exit(). This results in
a permanent clock resource leak.
>
> gtr_dev->tx_term_fix = false;
> }
>
> /* Enable coarse code saturation limiting logic. */
> xpsgtr_write_phy(gtr_phy, L0_TM_PLL_DIG_37, L0_TM_COARSE_CODE_LIMIT);
>
> /*
> * Configure the PLL, the lane protocol, and perform protocol-specific
> * initialization.
> */
> ret = xpsgtr_configure_pll(gtr_phy);
> if (ret)
> goto out;
[Severity: High]
This is a pre-existing issue, but does this error path also leak the clock?
Like the tx_term_fix failure above, this jumps to 'out' without calling
clk_disable_unprepare() on the clock enabled at the start of the function.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260627155229.2791113-1-radhey.shyam.pandey@amd.com?part=2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2026-06-27 16:02 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-27 15:52 [RESEND PATCH 0/3] phy: zynqmp: fix SERDES scrambler register handling and enable for USB Radhey Shyam Pandey
2026-06-27 15:52 ` [RESEND PATCH 1/3] phy: zynqmp: fix L0_TM_DISABLE_SCRAMBLE_ENCODER mask Radhey Shyam Pandey
2026-06-27 16:02 ` sashiko-bot
2026-06-27 15:52 ` [RESEND PATCH 2/3] phy: zynqmp: use read-modify-write for SERDES scrambler bypass Radhey Shyam Pandey
2026-06-27 16:02 ` sashiko-bot [this message]
2026-06-27 15:52 ` [RESEND PATCH 3/3] phy: zynqmp: keep SERDES scrambler and 8b/10b enabled for USB Radhey Shyam Pandey
2026-06-27 16:02 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260627160215.6CD681F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=neil.armstrong@linaro.org \
--cc=olteanv@gmail.com \
--cc=radhey.shyam.pandey@amd.com \
--cc=sashiko-reviews@lists.linux.dev \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox