Re: [PATCH v2 07/12] phy: phy-mtk-dp: Support setting volt swing and preemphasis values

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Analog PHY driving parameters are written to the wrong register offsets, misaligning signal driving settings.
- [Low] Compilation error due to undeclared variable `ret` in `mtk_dp_phy_probe`.
--

--- Patch [7]: [PATCH v2 07/12] phy: phy-mtk-dp: Support setting volt swing and preemphasis values ---
commit 83b16a974d2259d5e6f2e7cfa570e7b31e4ec7e5
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

phy: phy-mtk-dp: Support setting volt swing and preemphasis values

This commit adds support for setting voltage swing and preemphasis values
in the DP PHY .configure() callback by honoring the set_voltages request.
It also ensures proper hardware cleanup by resetting both values in the
.reset() callback.

> diff --git a/drivers/phy/mediatek/phy-mtk-dp.c b/drivers/phy/mediatek/phy-mtk-dp.c
> index 2f3ec3fa384df..270825f130a95 100644
> --- a/drivers/phy/mediatek/phy-mtk-dp.c
> +++ b/drivers/phy/mediatek/phy-mtk-dp.c
[ ... ]
> @@ -101,6 +106,7 @@ enum mtk_dp_phya_ana_glb_regidx {
>  };
>  
>  enum mtk_dp_phyd_dig_lane_regidx {
> +	DP_PHYD_LAN_DRIVING_FORCE,
>  	DP_PHYD_LAN_DRIVING_PARAM_0,
>  	DP_PHYD_LAN_MAX
>  };

[Severity: High]
Are the analog PHY driving parameters being written to the wrong register
offsets, misaligning the signal driving settings?

The base offset for initializing the analog PHY driving parameters appears to
have shifted from PARAM_3 (0x1138) to PARAM_0 (0x112c), but the
driving_params array still contains the 6 default values meant for PARAM_3
through PARAM_8:

drivers/phy/mediatek/phy-mtk-dp.c:mtk_dp_phy_init() {
    ...
	const u32 reg = pdata->regs_dig_lane[DP_PHYD_LAN_DRIVING_PARAM_0];
	static const u32 driving_params[] = {
		DRIVING_PARAM_3_DEFAULT,
		DRIVING_PARAM_4_DEFAULT,
		DRIVING_PARAM_5_DEFAULT,
		DRIVING_PARAM_6_DEFAULT,
		DRIVING_PARAM_7_DEFAULT,
		DRIVING_PARAM_8_DEFAULT
	};
    ...
	for (i = 0; i < MTK_DP_PHY_MAX_LANES; i++) {
		ret = regmap_bulk_write(dp_phy->regmap,
					pdata->off_dig_lane[i] + reg,
					driving_params,
					ARRAY_SIZE(driving_params));
    ...
}

Writing the defaults for params 3-8 into params 0-5 would leave params 6-8
uninitialized and corrupt the settings for params 0-5, which could lead to
incorrect link training.

[Severity: Low]
Is there a missing declaration for the variable ret in mtk_dp_phy_probe()?

drivers/phy/mediatek/phy-mtk-dp.c:mtk_dp_phy_probe() {
    ...
	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
	if (IS_ERR(provider))
		return PTR_ERR(provider);

	ret = devm_pm_runtime_enable(dev);
	if (ret)
		return ret;

	return 0;
}

This causes a compilation error because ret is used without being declared.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260707141931.191172-1-angelogioacchino.delregno@collabora.com?part=7

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy