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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org This patch series introduces support for retaining the PCIe link across bootloader and kernel handoff on Qualcomm platforms, specifically X1E80100. The goal is to reduce boot time and avoid unnecessary link reinitialization when the link is already up. We are not enabling link retantion support for all the targets, as there is no guarantee that the bootloader on all targets has initialized the PCIe link in max supported speed. So we are enabling for hamoa & glymur target only for now based on the config flag. If the link is up and has link_retain is set to true in the ithe driver config data then enable retain logic in the controller. In phy as we already have skip init logic, the phy patch uses same assumption that if there is phy no csr and bootloader has done the init then driver can skip resetting the phy when phy status indicates it is up. Problem:- 1) As part of late init calls of clock the framework is disabling all the unvoted resources by that time and also there is no sync state to keep them enabled till the probe is completed. Due to dependencies with regulators and phy, qcom pcie probe is happening after late init which is causing the resources(clocks) to be off which causes the link to go down. To avoid this we need to use this kernel command line argument (clk_ignore_unused) to skip disabling clocks as part of late init for initial version. Once it is resolved we can avoid those kernel command line argument. Signed-off-by: Krishna Chaitanya Chundru --- Changes in v3: - Updated the max link speed and current link speed logic for link retain. - Fixed l1ss_support & probe deffer fix as pointed by sashiko. - Link to v2: https://patch.msgid.link/20260521-link_retain-v2-0-08ed448b081c@oss.qualcomm.com Changes in v2: - Rebased with latest changes - GENPD/power domains are not longer getting turned off with the latest kernel, only issue is with the clocks. - Removed the patch [2/5] PCI: dwc: Add support for retaining link during host init as we are not seeing much difference with this or without this (Bjorn). - couple of nits in commit & prints (Mani). - Remove skip_reset for the long term (Dmitry). - Link to v1: https://lore.kernel.org/r/20260109-link_retain-v1-0-7e6782230f4b@oss.qualcomm.com --- Krishna Chaitanya Chundru (4): phy: qcom: qmp-pcie: Skip PHY reset if already up PCI: qcom: Keep PERST# GPIO state as-is during probe PCI: qcom: Add link retention support PCI: qcom: enable Link retain logic for Hamoa drivers/pci/controller/dwc/pcie-designware.h | 1 + drivers/pci/controller/dwc/pcie-qcom.c | 80 +++++++++++++++++++++++++--- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 31 +++++++---- 3 files changed, 96 insertions(+), 16 deletions(-) --- base-commit: ce1f20ceb245f81cc147bf4fd570c09f9f720ab2 change-id: 20251001-link_retain-f181307947e4 Best regards, -- Krishna Chaitanya Chundru -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy