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From: sashiko-bot@kernel.org
To: "Cody Kang" <codykang.hk@gmail.com>
Cc: robh@kernel.org, olteanv@gmail.com,
	linux-phy@lists.infradead.org, conor+dt@kernel.org,
	vkoul@kernel.org, dri-devel@lists.freedesktop.org,
	neil.armstrong@linaro.org, devicetree@vger.kernel.org
Subject: Re: [PATCH RESEND 14/17] riscv: dts: spacemit: k3: add display nodes
Date: Sat, 25 Jul 2026 05:08:18 +0000	[thread overview]
Message-ID: <20260725050818.E72A21F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260725-k3-display-v1-14-6de34d80e86c@gmail.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The DP controller hardware is not initialized before the eDP panel probe is triggered, causing synchronous AUX transfers to fail or hang.
- [High] The custom EDID read function violates the I2C EEPROM protocol by omitting the Middle-of-Transaction (MOT) bit, breaking EDID reads on sinks that require a repeated START.
--

--- Patch [14]: [PATCH RESEND 14/17] riscv: dts: spacemit: k3: add display nodes ---
commit 9b9ee39195ad90a76f056f9bddbdabb8377b67ec
Author: Cody Kang <codykang.hk@gmail.com>

riscv: dts: spacemit: k3: add display nodes

Add the SoC-level display nodes: the two Saturn DPUs, the two DP/eDP
controllers with their PHY children.

> diff --git a/arch/riscv/boot/dts/spacemit/k3-display.dtsi b/arch/riscv/boot/dts/spacemit/k3-display.dtsi
> new file mode 100644
> index 0000000000000..4892ee6acda22
> --- /dev/null
> +++ b/arch/riscv/boot/dts/spacemit/k3-display.dtsi
> @@ -0,0 +1,156 @@
[ ... ]
> +&soc {
[ ... ]
> +	edp0: edp@cac84000 {
> +		compatible = "spacemit,k3-inno-dp";

[Severity: High]
Does enabling this device node cause the eDP panel probe to fail?

Looking at inno_dp_probe() in drivers/gpu/drm/spacemit/spacemit_inno_dp.c, it
populates the eDP panel device on the AUX bus:

    ret = devm_of_dp_aux_populate_bus(&dp->aux,
                                      spacemit_dp_edp_link_panel);

The panel driver probes synchronously and attempts an AUX transfer to read the
EDID.

However, the DP controller's hardware registers (including the AUX clock
divider DP_AUX_CTRL_CLK_DIV and soft resets) are not initialized until later:

spacemit_inno_dp.c:spacemit_dp_bind() {
    ...
    ret = spacemit_dp_dev_init(dp);
    ...
}

The uninitialized controller ignores the transfer or the AUX state machine
does not start, causing an unavoidable timeout.

> +		reg = <0x0 0xcac84000 0x0 0x4000>;
[ ... ]
> +	dp1: dp@cac88000 {
> +		compatible = "spacemit,k3-inno-dp";

[Severity: High]
Will EDID reads fail for sinks connected to this node?

When reading EDID, the driver splits the transaction into a write and a read:

spacemit_inno_dp.c:spacemit_dp_conn_get_edid_block() {
    ...
    ret = spacemit_dp_aux_i2c_write(dp, DDC_ADDR,
                                    &edid_offset, 1);
    ...
}

It calls spacemit_dp_aux_i2c_write() which hardcodes the request:

spacemit_inno_dp.c:spacemit_dp_aux_i2c_write() {
    ...
    .request = DP_AUX_I2C_WRITE,
    ...
}

The missing MOT (Middle-of-Transaction) bit guarantees an I2C STOP condition
after writing the offset address. This resets the internal address pointer of
many standard EEPROMs, causing the subsequent read to repeatedly fetch block 0
instead of the requested extension block.

> +		reg = <0x0 0xcac88000 0x0 0x4000>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260725-k3-display-v1-0-6de34d80e86c@gmail.com?part=14

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2026-07-25  5:08 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-25  4:51 [PATCH RESEND 00/17] drm/spacemit: add SpacemiT K3 display support Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 01/17] dt-bindings: display: spacemit: add K3 Saturn DPU controller Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 02/17] dt-bindings: phy: add SpacemiT K3 Innosilicon DP PHY Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 03/17] dt-bindings: display: spacemit: add K3 Innosilicon DP/eDP controller Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 04/17] dt-bindings: soc: spacemit: allow eDP/DP PHY PLL pixel clocks on K3 APMU Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 05/17] phy: spacemit: add Innosilicon DP TX PHY driver Cody Kang via B4 Relay
2026-07-25  5:02   ` sashiko-bot
2026-07-25  4:51 ` [PATCH RESEND 06/17] clk: spacemit: k3: parent eDP/DP pixel clock to the PHY PLL Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 07/17] drm/spacemit: add Saturn DPU register model Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 08/17] drm/spacemit: add Saturn DPU core types, cmdlist and display MMU Cody Kang via B4 Relay
2026-07-25  5:04   ` sashiko-bot
2026-07-25  4:51 ` [PATCH RESEND 09/17] drm/spacemit: add Saturn DPU hardware backend Cody Kang via B4 Relay
2026-07-25  5:12   ` sashiko-bot
2026-07-25  4:51 ` [PATCH RESEND 10/17] drm/spacemit: add Saturn DPU KMS pipeline Cody Kang via B4 Relay
2026-07-25  5:04   ` sashiko-bot
2026-07-25  4:51 ` [PATCH RESEND 11/17] drm/spacemit: add Saturn DPU DRM device driver Cody Kang via B4 Relay
2026-07-25  5:05   ` sashiko-bot
2026-07-25  4:51 ` [PATCH RESEND 12/17] drm/spacemit: add Innosilicon DP/eDP controller bridge driver Cody Kang via B4 Relay
2026-07-25  5:04   ` sashiko-bot
2026-07-25  4:51 ` [PATCH RESEND 13/17] MAINTAINERS: add SpacemiT K3 display driver entry Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 14/17] riscv: dts: spacemit: k3: add display nodes Cody Kang via B4 Relay
2026-07-25  5:08   ` sashiko-bot [this message]
2026-07-25  4:51 ` [PATCH RESEND 15/17] riscv: dts: spacemit: k3-pico-itx: enable the DisplayPort output Cody Kang via B4 Relay
2026-07-25  5:12   ` sashiko-bot
2026-07-25  4:51 ` [PATCH RESEND 16/17] riscv: dts: spacemit: k3-com260-ifx: " Cody Kang via B4 Relay
2026-07-25  4:51 ` [PATCH RESEND 17/17] riscv: defconfig: spacemit: k3: enable display driver Cody Kang via B4 Relay

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