Re: [PATCH] phy: zynqmp: register PHY provider after probe initialization

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Using asynchronous pm_runtime_put() immediately before pm_runtime_disable() on the new error path cancels the pending suspend, leaving the hardware in an active power state.
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--- Patch [1]: [PATCH] phy: zynqmp: register PHY provider after probe initialization ---
commit d73f55f7c5982fd671a5ed442cce7f38caa3d78a
Author: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>

phy: zynqmp: register PHY provider after probe initialization

This commit moves the registration of the OF PHY provider to the end of
probe, after saved_regs allocation and runtime PM are successfully setup.
This prevents concurrent consumers from obtaining references to driver
state that could be freed if the probe failed later.

Link: https://lore.kernel.org/all/20260720155732.9DA581F000E9@smtp.kernel.org

> diff --git a/drivers/phy/xilinx/phy-zynqmp.c b/drivers/phy/xilinx/phy-zynqmp.c
> --- a/drivers/phy/xilinx/phy-zynqmp.c
> +++ b/drivers/phy/xilinx/phy-zynqmp.c
[ ... ]
> @@ -1082,6 +1075,14 @@ static int xpsgtr_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> +	provider = devm_of_phy_provider_register(&pdev->dev, xpsgtr_xlate);
> +	if (IS_ERR(provider)) {
> +		dev_err(&pdev->dev, "registering provider failed\n");
> +		pm_runtime_put(gtr_dev->dev);
> +		pm_runtime_disable(gtr_dev->dev);

[Severity: Medium]
Does this error path leave the device in an active power state?

Using pm_runtime_put() queues an asynchronous idle notification. Calling
pm_runtime_disable() immediately afterward cancels pending async suspend
work, leaving the hardware active.

Would it be better to use pm_runtime_put_sync() here to ensure the device
is synchronously suspended before disabling runtime PM?

> +		return PTR_ERR(provider);
> +	}
> +
>  	return 0;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260807162510.3681572-1-radhey.shyam.pandey@amd.com?part=1

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