Re: [PATCH v2 2/5] dt-bindings: PCI: qcom,shikra-pcie: Document the Shikra PCIe Controller

From: Krzysztof Kozlowski <krzk@kernel.org>
To: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
Cc: "Vinod Koul" <vkoul@kernel.org>,
	"Neil Armstrong" <neil.armstrong@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>,
	"Bartosz Golaszewski" <brgl@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 2/5] dt-bindings: PCI: qcom,shikra-pcie: Document the Shikra PCIe Controller
Date: Tue, 1 Sep 2026 10:42:14 +0200	[thread overview]
Message-ID: <20260901-silent-pearl-shrew-c63a16@quoll> (raw)
In-Reply-To: <20260831-shikra-upstream-v2-2-406661d75afa@oss.qualcomm.com>

On Mon, Aug 31, 2026 at 12:56:02PM +0530, Sushrut Shree Trivedi wrote:
> Add a dedicated schema for the PCIe controller found on the Shikra
> platform.
> 
> Shikra controller supports upto PCIe Gen3 but the PHY is
> only capable of Gen2, hence the max link speed  is limited
> to Gen2 to avoid link-up failures.
> 
> Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com>
> ---
>  .../devicetree/bindings/pci/qcom,shikra-pcie.yaml  | 218 +++++++++++++++++++++
>  1 file changed, 218 insertions(+)
> 

What is the difference in the binding against Eliza? IOW, why does this
need a separate file unlike Eliza?

...

> +            reset-names = "pci";
> +
> +            power-domains = <&gcc GCC_PCIE_GDSC>;
> +
> +            max-link-speed = <2>;
> +
> +            operating-points-v2 = <&pcie_opp_table>;
> +
> +            pcie_opp_table: opp-table {
> +                    compatible = "operating-points-v2";

Are you sure dt-check-style does not complain?

> +
> +                    /* GEN 1 x1 */
> +                    opp-2500000 {
> +                            opp-hz = /bits/ 64 <2500000>;
> +                            required-opps = <&rpmpd_opp_low_svs>;
> +                            opp-peak-kBps = <250000 1>;
> +                            opp-level = <1>;
> +                    };
> +

Best regards,
Krzysztof

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