From: sashiko-bot@kernel.org
To: "Bryan O'Donoghue" <bryan.odonoghue@linaro.org>
Cc: robh@kernel.org, media-ci@linuxtv.org,
devicetree@vger.kernel.org, neil.armstrong@linaro.org,
conor+dt@kernel.org, olteanv@gmail.com, vkoul@kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v17 1/2] dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema
Date: Thu, 03 Sep 2026 20:59:39 +0000 [thread overview]
Message-ID: <20260903205939.ED3561F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260903-x1e-csi2-phy-v17-1-26606fa9a039@linaro.org>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] Missing `maxItems: 1` constraint on `endpoint@1` `data-lanes`.
- [Low] Mismatch in `required-opps` array length relative to `power-domains` in the example.
- [Low] Type mismatch constraint on `clock-lanes` using a scalar `const`.
--
commit be1ee8982134944fca33ceaa85eed2383dcf7ea6
Author: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema
This commit adds a base schema for the MIPI CSI2 PHYs on Qualcomm SoCs.
The PHY supports both C-PHY and D-PHY operation, as well as a combo-mode
that allows for two sensors to be connected to one PHY.
> diff --git a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> new file mode 100644
> index 0000000000000..993271c42fa06
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
[ ... ]
> + allOf:
> + - if:
> + required:
> + - endpoint@1
> + then:
> + properties:
> + endpoint@0:
> + properties:
> + clock-lanes:
> + const: 0
[Severity: Low]
Will this pass dtbs_check validation?
Because the clock-lanes property uses a -lanes suffix, dt-schema evaluates
the payload from the device tree as an array. Using a scalar "const: 0"
checks for an integer, which can cause a type mismatch.
Should this be written as an array constraint, such as "items: - const: 0"?
> + data-lanes:
> + maxItems: 2
> + endpoint@1:
> + properties:
> + clock-lanes:
> + const: 3
[Severity: Low]
Similarly, should this use an array item constraint rather than a scalar
constant to prevent a validation type mismatch with the clock-lanes array?
> + data-lanes:
> + items:
> + - const: 4
[Severity: Medium]
Is it necessary to add "maxItems: 1" here to properly restrict the property
to a single data lane?
Since maxItems is inherited as 4 from the base definition, a configuration
like data-lanes = <4 2> might falsely pass schema validation without an
explicit maxItems override.
> + required:
> + - endpoint@0
> + else:
> + patternProperties:
> + "^endpoint(@0)?$":
> + properties:
> + clock-lanes:
> + const: 0
[Severity: Low]
As with the other clock-lanes definitions above, does this scalar constant
need to be updated to match the array evaluation of dt-schema?
[ ... ]
> + csiphy_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-300000000 {
> + opp-hz = /bits/ 64 <300000000>;
> + required-opps = <&rpmhpd_opp_low_svs_d1>,
> + <&rpmhpd_opp_low_svs_d1>;
[Severity: Low]
Does this required-opps array length match the power-domains definition
provided earlier in the example?
The example block defines 3 power-domains ("top", "mmcx", "mx") but only
provides 2 entries here. In the Linux PM domain framework, required-opps
maps 1:1 to power-domains by index, which leaves the scalable mx domain
without an OPP mapping.
Should this be padded to 3 entries (e.g., using <0> for the non-scalable
GDSC)?
> + };
> + };
> + };
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260903-x1e-csi2-phy-v17-0-26606fa9a039@linaro.org?part=1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2026-09-03 20:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-03 20:44 [PATCH v17 0/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver Bryan O'Donoghue
2026-09-03 20:44 ` [PATCH v17 1/2] dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema Bryan O'Donoghue
2026-09-03 20:59 ` sashiko-bot [this message]
2026-09-03 20:44 ` [PATCH v17 2/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver Bryan O'Donoghue
2026-09-03 20:54 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260903205939.ED3561F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=bryan.odonoghue@linaro.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=media-ci@linuxtv.org \
--cc=neil.armstrong@linaro.org \
--cc=olteanv@gmail.com \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox