Re: [PATCH net-next v9 05/11] arm64: dts: rockchip: rk3568: add XPCS and fixed-clock nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] DT style violation: non-reg nodes placed out of order
--

commit 1674fcfaeba70039871d92af0a02901f9d009886
Author: Coia Prant <coiaprant@gmail.com>

arm64: dts: rockchip: rk3568: add XPCS and fixed-clock nodes

This commit adds the Synopsys DesignWare XPCS and two fixed-clock nodes for
GMAC reference clocks to the RK3568 device tree. It places the nodes and adds
necessary properties for board-level configuration.

> diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> index 3bc653f027f1f..227d03e336043 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
[ ... ]
> @@ -110,6 +110,51 @@ sata0: sata@fc000000 {
>  		status = "disabled";
>  	};
>  
> +	xpcs: ethernet-pcs@fda00000 {
[ ... ]
> +		xpcs_mii3: ethernet-pcs-mii@3 {
> +			reg = <3>;
> +			status = "disabled";
> +		};
> +	};
> +
> +	clk_gmac0_xpcs_mii: clock-xpcs-gmac0 {
> +		compatible = "fixed-clock";
> +		clock-frequency = <125000000>;
> +		clock-output-names = "clk_gmac0_xpcs_mii";
> +		#clock-cells = <0>;
> +	};
> +
> +	clk_gmac1_xpcs_mii: clock-xpcs-gmac1 {
> +		compatible = "fixed-clock";
> +		clock-frequency = <125000000>;
> +		clock-output-names = "clk_gmac1_xpcs_mii";
> +		#clock-cells = <0>;
> +	};

[Severity: Low]
According to standard Device Tree coding style guidelines
(Documentation/devicetree/bindings/dts-coding-style.rst), should nodes
without a 'reg' property be placed at the top of the file (or the top of
the root node) and sorted alphabetically, before any nodes with a 'reg'
property?

These clock-xpcs-gmac0 and clock-xpcs-gmac1 nodes in
arch/arm64/boot/dts/rockchip/rk3568.dtsi lack a 'reg' property but are
placed directly after ethernet-pcs@fda00000 and before syscon@fdc70000.

Could these be moved to the top of the root node alongside other non-reg
nodes like opp-table?

> +
>  	pipe_phy_grf0: syscon@fdc70000 {
>  		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
>  		reg = <0x0 0xfdc70000 0x0 0x1000>;

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