From: sashiko-bot@kernel.org
To: "Stefan Dösinger" <stefandoesinger@gmail.com>
Cc: olteanv@gmail.com, lee@kernel.org, devicetree@vger.kernel.org,
conor+dt@kernel.org, mfd@lists.linux.dev, vkoul@kernel.org,
linux-phy@lists.infradead.org, linux-clk@vger.kernel.org,
neil.armstrong@linaro.org, robh@kernel.org
Subject: Re: [PATCH v12 08/12] clk: zte: Introduce a driver for zx297520v3 top clocks
Date: Wed, 23 Sep 2026 18:44:01 +0000 [thread overview]
Message-ID: <20260923184402.03FC81F00898@smtp.kernel.org> (raw)
In-Reply-To: <20260923-zx29clk-v12-8-9c243796b6d2@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] clk: zte: clock provider registered with NULL of_node breaks DT consumers
--
commit 941de7b2f6e4b79d334d74edd0d2dd9620fabd7e
Author: Stefan Dösinger <stefandoesinger@gmail.com>
clk: zte: Introduce a driver for zx297520v3 top clocks
This commit introduces a new clock driver for the ZTE zx297520v3 SoC top
clocks, which control core devices like PLLs, AHB bus, timers, and USB.
It registers as an MFD child device and provides various clock gates,
dividers, and muxes to the system.
> diff --git a/drivers/clk/zte/Kconfig b/drivers/clk/zte/Kconfig
> index 152c2423b8f02..0ccc6edf3c5b1 100644
> --- a/drivers/clk/zte/Kconfig
> +++ b/drivers/clk/zte/Kconfig
> @@ -15,3 +15,14 @@ config COMMON_CLK_ZTE
> of this.
>
> Enable this if you are building a kernel for a ZTE designed board.
> +
> +config CLK_ZTE_ZX297520V3
> + tristate "Clock driver for ZTE zx297520v3 based SoCs"
> + depends on COMMON_CLK_ZTE && (MFD_ZTE_ZX297520V3_CRM || COMPILE_TEST)
[Severity: Medium]
This is a pre-existing issue, but will enabling this new configuration cause
linker errors on builds where CONFIG_RATIONAL is not selected elsewhere?
Building the kernel with CONFIG_COMMON_CLK_ZTE=y (which is forced by this new
config) without CONFIG_RATIONAL causes an undefined reference to
rational_best_approximation.
The failure occurs in drivers/clk/zte/pll-zx.c:zx29_pll_calc_values():
rational_best_approximation(vco, parent_rate,
(1 << hweight32(ZX29_PLL_FBDIV_MASK)) - 1,
(1 << hweight32(ZX29_PLL_REFDIV_MASK)) - 1,
&fbdiv, &refdiv);
Should RATIONAL be explicitly selected by this new config, or perhaps added to
COMMON_CLK_ZTE directly?
> diff --git a/drivers/clk/zte/clk-zx297520v3.c b/drivers/clk/zte/clk-zx297520v3.c
> new file mode 100644
> index 0000000000000..68bfeab84d745
> --- /dev/null
> +++ b/drivers/clk/zte/clk-zx297520v3.c
[ ... ]
> +static int clk_zx297520v3_probe(struct platform_device *pdev)
> +{
> + const struct platform_device_id *id = platform_get_device_id(pdev);
> +
> + if (!id)
> + return -ENODEV;
> +
> + return zx_clk_common_probe(&pdev->dev, pdev->dev.parent->of_node,
> + (const struct zx_clk_data *)id->driver_data);
> +}
[Severity: High]
Since this driver is an MFD child, will registering the clock provider using
the child's device pointer result in a NULL device tree node?
In clk_zx297520v3_probe, the code correctly passes pdev->dev.parent->of_node
to zx_clk_common_probe to handle regmap lookups. However, the device pointer
passed is still pdev->dev:
drivers/clk/zte/clk-zx297520v3.c:clk_zx297520v3_probe()
return zx_clk_common_probe(&pdev->dev, pdev->dev.parent->of_node,
(const struct zx_clk_data *)id->driver_data);
When zx_clk_common_probe registers the provider, it uses the passed device
structure which lacks an of_node:
drivers/clk/zte/clk-zx.c:zx_clk_common_probe()
return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, exports);
Because the MFD child cell doesn't have an explicit device tree node,
dev->of_node is NULL. Could this cause device tree consumers to fail to find
and acquire these clocks during boot?
Should pdev->dev.of_node be explicitly assigned to pdev->dev.parent->of_node
prior to calling zx_clk_common_probe?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260923-zx29clk-v12-0-9c243796b6d2@gmail.com?part=8
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2026-09-23 18:44 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 18:28 [PATCH v12 00/12] ZTE zx297520v3 clock bindings and driver Stefan Dösinger
2026-09-23 18:28 ` [PATCH v12 01/12] dt-bindings: clk: zte: Add zx297520v3 top clock and reset controller Stefan Dösinger
2026-09-23 18:33 ` sashiko-bot
2026-09-23 18:28 ` [PATCH v12 02/12] dt-bindings: clk: zte: Add zx297520v3 matrix " Stefan Dösinger
2026-09-23 18:37 ` sashiko-bot
2026-09-23 18:28 ` [PATCH v12 03/12] dt-bindings: clk: zte: Add zx297520v3 LSP " Stefan Dösinger
2026-09-23 18:32 ` sashiko-bot
2026-09-23 18:28 ` [PATCH v12 04/12] mfd: zx297520v3: Add a clock and reset MFD driver Stefan Dösinger
2026-09-23 18:35 ` sashiko-bot
2026-09-24 14:15 ` Lee Jones
2026-09-23 18:28 ` [PATCH v12 05/12] clk: zte: Add Clock registration infrastructure Stefan Dösinger
2026-09-23 18:36 ` sashiko-bot
2026-09-23 18:28 ` [PATCH v12 06/12] clk: zte: Add regmap-based clocks Stefan Dösinger
2026-09-23 18:38 ` sashiko-bot
2026-09-23 18:28 ` [PATCH v12 07/12] clk: zte: Add zx PLL support infrastructure Stefan Dösinger
2026-09-23 18:42 ` sashiko-bot
2026-09-23 18:28 ` [PATCH v12 08/12] clk: zte: Introduce a driver for zx297520v3 top clocks Stefan Dösinger
2026-09-23 18:44 ` sashiko-bot [this message]
2026-09-23 18:28 ` [PATCH v12 09/12] clk: zte: Introduce a driver for zx297520v3 matrix clocks Stefan Dösinger
2026-09-23 18:40 ` sashiko-bot
2026-09-23 19:06 ` Stefan Dösinger
2026-09-23 18:28 ` [PATCH v12 10/12] clk: zte: Introduce a driver for zx297520v3 LSP clocks Stefan Dösinger
2026-09-23 18:40 ` sashiko-bot
2026-09-23 18:28 ` [PATCH v12 11/12] reset: zte: Add a zx297520v3 reset driver Stefan Dösinger
2026-09-23 18:45 ` sashiko-bot
2026-09-23 18:28 ` [PATCH v12 12/12] ARM: dts: zte: Declare zx297520v3 CRM device nodes Stefan Dösinger
2026-09-23 18:39 ` sashiko-bot
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