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Tue, 06 Oct 2026 09:28:17 -0700 (PDT) Received: from server.lan ([168.138.199.194]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-89188a0d603sm259898b3a.19.2026.10.06.09.28.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Oct 2026 09:28:16 -0700 (PDT) From: Coia Prant To: Vinod Koul Cc: Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Coia Prant Subject: [PATCH v13 0/2] phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 Date: Wed, 7 Oct 2026 00:28:04 +0800 Message-ID: <20261006162807.2843858-1-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261006_092818_596316_6AD798B1 X-CRM114-Status: GOOD ( 11.81 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Changes since v12: - Only write pipe_sgmii_mac_sel when the property is present, leaving the routing unchanged otherwise (Shawn). - Validate the value in the driver and reject anything other than 0 or 1 (Shawn). - Drop "default: 1" from the binding; the property is tri-state, so no 'default' in the schema is appropriate (Rob). This is the PHY part split out from the v10 RK3568 SGMII series, sent separately to linux-phy as suggested by Vinod and Jakub. On RK3568, the SGMII interface can be routed to either GMAC0 or GMAC1 via the GRF register pipe_sgmii_mac_sel. Patch 1 documents the "rockchip,sgmii-mac-sel" DT property, patch 2 adds the driver support. >From the RK3568 TRM (Part1, Page 229), PIPE_GRF_XPCS_CON0 bit 1 (pipe_sgmii_mac_sel) is defined as: 0: SGMII routed to GMAC0 1: SGMII routed to GMAC1 The hardware reset value is 1 (GMAC1). If the property is set to 0, the driver routes SGMII to GMAC0; if set to 1, it routes to GMAC1. If the property is absent, the driver leaves the routing unchanged, so the effective value is whatever the bootloader or hardware reset left. This is necessary for boards such as the Ariaboard Photonicat, which uses the SGMII interface connected to GMAC0. The DTS changes using this property are sent separately to Heiko/linux-rockchip, and the net-next parts (XPCS glue, dwmac-rk SGMII support) are sent separately to net-next. There is no hard dependency; the pieces can converge during the merge window. --- Coia Prant (2): dt-bindings: phy: rockchip: naneng-combphy: add rockchip,sgmii-mac-sel property phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 .../phy/phy-rockchip-naneng-combphy.yaml | 13 ++++++ .../rockchip/phy-rockchip-naneng-combphy.c | 42 +++++++++++++++++++ 2 files changed, 55 insertions(+) -- 2.47.3 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy