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From: Jason Yang <jason98166@gmail.com>
To: Vinod Koul <vkoul@kernel.org>,
	 Neil Armstrong <neil.armstrong@linaro.org>,
	 Manivannan Sadhasivam <mani@kernel.org>,
	Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	 Guochun Huang <hero.huang@rock-chips.com>,
	 Philipp Zabel <p.zabel@pengutronix.de>
Cc: Michael Riesch <michael.riesch@collabora.com>,
	 Sebastian Reichel <sebastian.reichel@collabora.com>,
	 Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
	 linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	 linux-kernel@vger.kernel.org, Jason Yang <jason98166@gmail.com>
Subject: [PATCH v5 8/8] arm64: dts: rockchip: add mipi csi-2 receiver nodes for the dcphys on rk3588
Date: Fri, 16 Oct 2026 16:56:42 +0800	[thread overview]
Message-ID: <20261016-dcphy-rx-v1-v5-8-e63b49eabe2d@gmail.com> (raw)
In-Reply-To: <20261016-dcphy-rx-v1-v5-0-e63b49eabe2d@gmail.com>

The MIPI0 and MIPI1 receiver units are connected to MIPI DCPHY0 and
MIPI DCPHY1, whose receiver side is now supported. Add the two nodes and
wire them to the VICAP ports.

Signed-off-by: Jason Yang <jason98166@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 68 +++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index 94d68fd89753..30bc69a09102 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -1516,10 +1516,18 @@ vicap_dvp: port@0 {
 
 			vicap_mipi0: port@1 {
 				reg = <0x1>;
+
+				vicap_mipi0_input: endpoint {
+					remote-endpoint = <&csi0_output>;
+				};
 			};
 
 			vicap_mipi1: port@2 {
 				reg = <0x2>;
+
+				vicap_mipi1_input: endpoint {
+					remote-endpoint = <&csi1_output>;
+				};
 			};
 
 			vicap_mipi2: port@3 {
@@ -1568,6 +1576,66 @@ vicap_mmu: iommu@fdce0800 {
 		status = "disabled";
 	};
 
+	csi0: csi@fdd10000 {
+		compatible = "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2";
+		reg = <0x0 0xfdd10000 0x0 0x10000>;
+		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "err1", "err2";
+		clocks = <&cru PCLK_CSI_HOST_0>;
+		phys = <&mipidcphy0 PHY_TYPE_DPHY PHY_DIRECTION_RX>;
+		power-domains = <&power RK3588_PD_VI>;
+		resets = <&cru SRST_P_CSI_HOST_0>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			csi0_in: port@0 {
+				reg = <0>;
+			};
+
+			csi0_out: port@1 {
+				reg = <1>;
+
+				csi0_output: endpoint {
+					remote-endpoint = <&vicap_mipi0_input>;
+				};
+			};
+		};
+	};
+
+	csi1: csi@fdd20000 {
+		compatible = "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2";
+		reg = <0x0 0xfdd20000 0x0 0x10000>;
+		interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "err1", "err2";
+		clocks = <&cru PCLK_CSI_HOST_1>;
+		phys = <&mipidcphy1 PHY_TYPE_DPHY PHY_DIRECTION_RX>;
+		power-domains = <&power RK3588_PD_VI>;
+		resets = <&cru SRST_P_CSI_HOST_1>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			csi1_in: port@0 {
+				reg = <0>;
+			};
+
+			csi1_out: port@1 {
+				reg = <1>;
+
+				csi1_output: endpoint {
+					remote-endpoint = <&vicap_mipi1_input>;
+				};
+			};
+		};
+	};
+
 	csi2: csi@fdd30000 {
 		compatible = "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2";
 		reg = <0x0 0xfdd30000 0x0 0x10000>;

-- 
2.43.0


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      parent reply	other threads:[~2026-10-16  8:57 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-16  8:56 [PATCH v5 0/8] phy: rockchip-samsung-dcphy: Add the MIPI D-PHY receiver Jason Yang
2026-10-16  8:56 ` [PATCH v5 1/8] dt-bindings: phy: Add PHY_DIRECTION_TX/RX definitions Jason Yang
2026-10-16 10:38   ` Bryan O'Donoghue
2026-10-16  8:56 ` [PATCH v5 2/8] dt-bindings: phy: rockchip,rk3588-mipi-dcphy: Add a cell to select TX or RX Jason Yang
2026-10-16 10:43   ` Bryan O'Donoghue
2026-10-16 14:01   ` Rob Herring
2026-10-16  8:56 ` [PATCH v5 3/8] phy: rockchip-samsung-dcphy: Move block-level setup to runtime resume Jason Yang
2026-10-16  9:09   ` sashiko-bot
2026-10-16 10:46   ` Bryan O'Donoghue
2026-10-16  8:56 ` [PATCH v5 4/8] phy: rockchip-samsung-dcphy: Name the transmitter helpers and ops Jason Yang
2026-10-16  9:07   ` sashiko-bot
2026-10-16  8:56 ` [PATCH v5 5/8] phy: rockchip-samsung-dcphy: Add a second PHY for the receiver Jason Yang
2026-10-16  8:56 ` [PATCH v5 6/8] phy: rockchip-samsung-dcphy: Add MIPI D-PHY receiver support Jason Yang
2026-10-16  8:56 ` [PATCH v5 7/8] arm64: dts: rockchip: use two phy cells for the rk3588 mipi dcphys Jason Yang
2026-10-16  8:56 ` Jason Yang [this message]

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