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[80.193.62.245]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a1bd9b35a6sm194605425e9.6.2026.10.17.00.04.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 17 Oct 2026 00:04:45 -0700 (PDT) From: George Neacsu To: Anusha Arun Nandi Cc: Bryan O'Donoghue , Vinod Koul , David Heidelberg , Neil Armstrong , Vladimir Zapolskiy , Loic Poulain , Konrad Dybcio , Nihal Kumar Gupta , Vikram Sharma , Suresh Vankadara , tjose@qti.qualcomm.com, Mauro Carvalho Chehab , Manivannan Sadhasivam , linux-phy@lists.infradead.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue , jigarkumar.zala@oss.qualcomm.com, hariram.purushothaman@oss.qualcomm.com Subject: Re: [PATCH v3 0/6] phy: qcom-mipi-csi2: C-PHY for X1E80100 Date: Sat, 17 Oct 2026 08:04:43 +0100 Message-ID: <20261017070443.989736-1-geocausa@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: <20261016-x1e-cphy-rfc-v3-0-40a346a72153@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261017_000447_804567_5F2A6656 X-CRM114-Status: UNSURE ( 9.11 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hi Anusha, On 17/10/2026 05:31, Anusha Arun Nandi wrote: > In our series we split C-PHY hw-ops into a dedicated > phy-qcom-mipi-csi2-3ph-cphy.c (mirroring the existing -3ph-dphy.c > split) Thanks, I had missed your July series. Your three series cover what this one does and more: the generic C-PHY API in its own phy-core-mipi-cphy.c like the D-PHY one, the C-PHY ops in their own file, two SoCs, and the CAMSS side including David's patches. The split makes sense to me, and two versions of PHY_MODE_MIPI_CPHY should not both go in. So I would rather build on yours than send a v4 of this series. I will send the X1E80100 sequence as one patch adding it to phy-qcom-mipi-csi2-3ph-cphy.c on top of your series, and test the whole stack on the Surface Pro 11 (IMX681 on CSIPHY2, one trio at 2.4 Gsym/s), with Tested-by on your patches if it works. Review of this series raised a few points that I will check against your patches and comment on there: - the settle count computed from the timer clock rate instead of a fixed table value (Nihal); - a u64 symbol rate, so 32-bit can hold rates above 4.29 Gsym/s; - trios instead of lanes in the C-PHY options (Loic). Also, Vinod and linux-phy are not on Cc for your PHY series. Bryan, Vinod: unless you would rather take this series, I will follow Anusha's. Thanks, George -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy