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Tue, 15 Oct 2024 02:46:24 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49F2kNHt003772 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Oct 2024 02:46:23 GMT Received: from [10.239.29.179] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 14 Oct 2024 19:46:17 -0700 Message-ID: <28567b77-9d0c-421a-8c2e-88a310a20704@quicinc.com> Date: Tue, 15 Oct 2024 10:46:15 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 6/8] PCI: qcom: Fix the ops for SC8280X family SoC To: Bjorn Helgaas CC: , , , , , , , , , , , , , , , , , , , , , , , Johan Hovold References: <20241014171807.GA612411@bhelgaas> Content-Language: en-US From: Qiang Yu In-Reply-To: <20241014171807.GA612411@bhelgaas> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 3wDoqdW48Ll3OwwhzQMMW2xvx-lvC8Qx X-Proofpoint-ORIG-GUID: 3wDoqdW48Ll3OwwhzQMMW2xvx-lvC8Qx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=999 lowpriorityscore=0 phishscore=0 adultscore=0 bulkscore=0 mlxscore=0 impostorscore=0 suspectscore=0 clxscore=1011 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410150017 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241014_194636_800586_0405C098 X-CRM114-Status: GOOD ( 22.47 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 10/15/2024 1:18 AM, Bjorn Helgaas wrote: > [+cc Johan; if you tag a commit with Fixes:, please cc the author of > that commit!] > > On Fri, Oct 11, 2024 at 03:41:40AM -0700, Qiang Yu wrote: >> On SC8280X family SoC, PCIe controllers are connected to SMMUv3, hence >> they don't need the config_sid() callback in ops_1_9_0 struct. Fix it by >> introducing a new ops struct, namely ops_1_21_0, so that BDF2SID mapping >> won't be configured during init. > Can you make the subject line say something specific about what this > patch does? "Fix the ops" really doesn't include any useful > information. Sure, will directly say Remove BDF2SID mapping config for SC8280XP in subject. > > Based on the Fixes: below, this has to do with ASPM, so the subject > line (and the commit log) should probably say something about ASPM. > > I don't see the connection between your mention of SMMUv3 and ASPM. > Are there two logical changes here that should be two separate > patches? This patch is to remove config_sid callback for sc8280x as it supports SMMUv3. This patch is not related to ASPM. Look like using 70574511f3f ("PCI: qcom: Add support for SC8280XP") in Fixes tag is better. Sorry for the confusion. Thanks, Qiang >> Fixes: d1997c987814 ("PCI: qcom: Disable ASPM L0s for sc8280xp, sa8540p and sa8295p") >> Signed-off-by: Qiang Yu >> --- >> drivers/pci/controller/dwc/pcie-qcom.c | 12 +++++++++++- >> 1 file changed, 11 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c >> index 88a98be930e3..468bd4242e61 100644 >> --- a/drivers/pci/controller/dwc/pcie-qcom.c >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c >> @@ -1367,6 +1367,16 @@ static const struct qcom_pcie_ops ops_2_9_0 = { >> .ltssm_enable = qcom_pcie_2_3_2_ltssm_enable, >> }; >> >> +/* Qcom IP rev.: 1.21.0 */ >> +static const struct qcom_pcie_ops ops_1_21_0 = { >> + .get_resources = qcom_pcie_get_resources_2_7_0, >> + .init = qcom_pcie_init_2_7_0, >> + .post_init = qcom_pcie_post_init_2_7_0, >> + .host_post_init = qcom_pcie_host_post_init_2_7_0, >> + .deinit = qcom_pcie_deinit_2_7_0, >> + .ltssm_enable = qcom_pcie_2_3_2_ltssm_enable, >> +}; >> + >> static const struct qcom_pcie_cfg cfg_1_0_0 = { >> .ops = &ops_1_0_0, >> }; >> @@ -1405,7 +1415,7 @@ static const struct qcom_pcie_cfg cfg_2_9_0 = { >> }; >> >> static const struct qcom_pcie_cfg cfg_sc8280xp = { >> - .ops = &ops_1_9_0, >> + .ops = &ops_1_21_0, >> .no_l0s = true, >> }; >> >> -- >> 2.34.1 >> -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy