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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 10/7/2026 1:13 PM, Dmitry Baryshkov wrote: > On Wed, Oct 07, 2026 at 11:59:36AM +0530, Pradeep P V K wrote: >> Add UFS PHY and UFS host controller nodes for Glymur SoC. >> >> Reviewed-by: Abel Vesa >> Signed-off-by: Pradeep P V K >> --- >> arch/arm64/boot/dts/qcom/glymur.dtsi | 125 ++++++++++++++++++++++++++++++++++- >> 1 file changed, 122 insertions(+), 3 deletions(-) >> >> @@ -4102,6 +4102,125 @@ rng: rng@10c3000 { >> reg = <0x0 0x010c3000 0x0 0x1000>; >> }; >> >> + ufs_mem_phy: phy@1d80000 { >> + compatible = "qcom,glymur-qmp-ufs-phy"; >> + reg = <0x0 0x01d80000 0x0 0x2000>; >> + >> + clocks = <&rpmhcc RPMH_CXO_CLK>, >> + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, >> + /* UFS and PCIE4 share the same clkref */ >> + <&tcsr TCSR_PCIE_4_CLKREF_EN>; >> + >> + clock-names = "ref", >> + "ref_aux", >> + "qref"; >> + >> + resets = <&ufs_mem_hc 0>; >> + reset-names = "ufsphy"; > > power-domains = <&gcc GCC_UFS_PHY_GDSC> ? Or is there > GCC_UFS_MEM_PHY_GDSC, which is simply not described in gcc? > > If there are none, it should be reflected in the DT bindings, together > with the explanation in the commit message. > Yes, Glymur SoC does not support UFS PHY GDSC. Sure, i will update the DT-bindings accordingly and include the explanation in the commit of next patch series. >> + >> + #clock-cells = <1>; >> + #phy-cells = <0>; >> + >> + status = "disabled"; >> + }; >> + > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy