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[144.49.247.120]) by smtp-relay.gmail.com with ESMTPS id 98e67ed59e1d1-3ad8602f10asm962934a91.1.2026.10.21.10.02.33 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Oct 2026 10:02:34 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-3ac575a9198so1581347a91.3 for ; Wed, 21 Oct 2026 10:02:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1792602152; x=1793206952; darn=lists.infradead.org; h=content-transfer-encoding:content-type:in-reply-to:autocrypt:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:from:to:cc:subject:date:message-id:reply-to :content-type; bh=8hOuabnxLm0beCp1h5BHdKuYcbUneAYJ9aWN1l0DLgQ=; b=RF3YvWkBDlNRlKBhbFxCjg3o8EtHmHZezlvBJpy4TJAB3Izor+nJKifL0ZsqD96hmY oPJlZxD3JX6tCXhdOpuMsC0rvHdQG9o2qFXn25TOlAVsW32ZUwPt3myGiCHTJC3pW4gj yYN83sYP8m/NCkpc78qhnPtQQau4ujZ3jGJjE= X-Forwarded-Encrypted: i=1; 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charset="us-ascii"; Format="flowed" Sender: "linux-phy" X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On 10/21/26 09:55, Florian Fainelli wrote: > This patch series fixes SATA on the Northstar Plus (BCM58xxx/8831x) > which was broken due to a number of things: > > - the SATA PHY assumed separate PCB windows when a shared one is used > for this generation of SoCs > - the clock/reset (IDM) was not being configured by the driver which > meant that depending upon what the boot loader did, or did not, we > could have had the AHCI controller still in reset by then > - on some reference boards, the AHCI controller is not DMA coherent, > assuming so leads to all sorts of timeouts, data corruption, etc. > > Since this touches several subsystems: DT, PHY, AHCI and DTS, I would be > keen on having Damien merge all of those via his tree if acceptable by > the DT and PHY maintainers, I am OK either way for Broadcom SoC. Argh, looks like I submitted patches 5 and 6 twice after I had re-ordered them, the correct order is in the cover letter: ARM: dts: broadcom: Use noncoherent SATA DMA on BCM958625HR ARM: dts: broadcom: Enable SATA on BCM958625HR Will wait for feedback and resubmit if necessary. Thanks! -- Florian -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy